Product Specification for Pictiva™ 96X64 OLED Module, Yellow

Transcrição

Product Specification for Pictiva™ 96X64 OLED Module,
Yellow, SSD0323
Title: Product Specification for Pictiva™ 96X64 OLED Module, Yellow, SSD0323
Page 1 of 22
Rev. A 10/2004
TABLE OF CONTENTS
PAGE
1.
TITLE
3
2.
REFERENCE DOCUMENTS
3
2.1 OSRAM Documents
2.2 IC Documents
3
3
3.
FEATURES, FUNCTIONS, and REQUIREMENTS
3.1 Product Summary
3.2 Electrical Characteristics
3.3 Display Programming
3.4 Optical Characteristics
3.5 Mechanical Characteristics
3
3
4
10
12
13
4.
PRODUCT MARKING
4.1 Part Label Marking
16
16
5.
QUALIFICATION TESTING
5.1 Qualification Tests
16
16
6.
COSMETIC CRITERIA
6.1 Zone Definition
6.2 Glass Layout Overview
6.3 Inspection Requirements
6.4 General Guidelines for Glass Defects
6.5 Glass Defect Inspection Criteria
17
17
17
18
18
19
Title: Product Specification for Pictiva™ 96X64 OLED Module, Yellow, SSD0323 Rev. A
OSRAM
Opto Semiconductors Inc.
Als Betriebsgeheimnis anvertraut. Alle Rechte vorbehalten.
Datei /File: DOCPATH
Proprietary data, company confidential. All rights reserved.
Seite/ Page :2/(22)
1.
TITLE:
Product Specification for Pictiva™ 96X64 OLED Module, Yellow, SSD0323
2.
REFERENCE DOCUMENTS:
2.1
2.2
3.
OSRAM Documents
2.1.1
501-0145
Qualification Plan for OLED Modules (Section 8.1)
2.1.2
C63062-H0250-A001-A
Module Drawing (with bezel)
2.1.3
C63062-H0252-A001-A
Module Drawing (no bezel)
2.1.4
C63062-H0254-A001-A
Internal DC-DC Module Drawing (with bezel)
2.1.5
A63850-M8600-D000-*-76G3
2.1.6
A63850-K8830-D000-*-76G3
Failure Catalogue for OLED Display Glass Breaking
& Excess Glass
Failure Catalogue for OLED Module
IC Documents
2.2.1
SOLOMON SSD0323 outline, pad and pin out drawing
2.2.2
SOLOMON SSD0323 128 x 80, 16 Gray scale Dot Matrix OLED/PLED Segment/Common
Driver with Controller
FEATURES, FUNCTIONS, and REQUIREMENTS
3.1
Product Summary
3.1.1
Description:
Table 3.1.1: General OLED Module Description
Part Number
Display Format
Pixel Pitch
Pixel Size
Display Diagonal
Color
Grayscale
Active Area
Module Size
Glass Size
Driver IC
Packaging and
Interconnect
OS096064PK12MY0Axx
96 columns x 64 rows
0.265 (W) x 0.265 (H) mm
0.235 (W) x 0.235 (H) mm
1.2”
Monochrome Yellow
4 bits
25.42 (W) X 16.94 (H) mm
34.75 (W) X 29.89 (H) X 3.83 (T)mm
(including bezel and components, excluding tabs)
33.85 (W) X 28.19 (H) X 2.1 (T) mm (including polarizer)
SSD0323
COF with ZIF tail
OSRAM
Seite/ Page :3/(22)
3.1.2
Part Number Options:
Table 3.1.2: Part Number Description
OS096064PK12MY
0Axx
xx = 00
(Standard)
xx = 01
Interface OLED Power
Supply
Parallel
External VCC
Serial
External VCC
xx = 10
Parallel
External VCC
Factory
Code
Stainless 34.75 (W) X 31.14 (H) X 3.83 (T) mm H0250
Steel
Steel
33.85 (W) X 29.20 (H) X 3.49 (T) mm H0252
None
xx = 20
(in development)
xx = 21
(in development)
Parallel
Internal VCC
(DC-DC included)
Internal VCC
(DC-DC included)
Steel
Steel
3.2
Serial
Bezel
Module Size
(excluding bezel tabs)
Electrical Characteristics
3.2.1
Functional Block Diagram:
OLED Module
User’s Board
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CPU/Controller
I/F FPC
COF
Row
Driver
96 x 64 OLED
Optional
DC-DC
converter
Driver IC
SSD0323
Column Driver
18 pin ZIF connector – Data (D0-D7), D/C#, CS#, RES#, R/W#, E, BS1, VDD, VCC, VSS
Figure 3-1: Overall block diagram of display module assembly and interface
OSRAM
Seite/ Page :4/(22)
3.2.2
Interface Pin Out:
There are two interface pin out options corresponding to the parallel and serial interface
requirements. The interface is factory-set by jumper JP1 on the FPC; JP1 = 1 for parallel
I/F, JP1 = 0 for serial I/F. For the parallel I/F version only, the user can select the interface
protocol using pin #3 BS1 (for Motorola 68 series or Intel 80 series).
Table 3.2.2.1: ZIF Connection Pin Out for External Power Supply (Standard)
Parallel I/F
Description
Chip Select
Reset
Parallel I/F protocol
Low: 68 series; High: 80 series
D/C#
High: Data in GDRAM
Low: Command
R/W#
Read/Write selector for 68 series;
(WR#) Write strobe for 80 series
E (RD#) E clock for 68 series;
RD strobe for 80 series
D0
Parallel Data 0
D1
Parallel Data 1
D2
Parallel Data 2
D3
Parallel Data 3
D4
Parallel Data 4
D5
Parallel Data 5
D6
Parallel Data 6
D7
Parallel Data 7
NC
No connect
VDD
Logic Power
VCC
OLED Power Supply
VSS
Ground
Pin No.
1
2
3
Name
CS#
RES#
BS1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Name
CS#
RES#
BS1
D/C#
Serial I/F
Description
Chip Select
Reset
Set to Low or connect to VSS
NC
High: Data in GDRAM
Low: Command
No connect
NC
No connect
SCLK
SDIN
NC
NC
NC
NC
NC
NC
NC
VDD
VCC
VSS
Serial Clock Input
Serial Data Input
No connect
No connect
No connect
No connect
No connect
No connect
No connect
Logic Power
OLED Power Supply
Ground
Table 3.2.2.2: ZIF Connection Pin Out for Internal Power Supply (optional internal DC-DC converter)
Parallel I/F
Description
Chip Select
Reset
Parallel I/F protocol
Low: 68 series; High: 80 series
D/C#
High: Data in GDRAM
Low: Command
R/W#
Read/Write selector for 68;
(WR#) Write strobe for 80
E (RD#) E clock for 68 series;
RD strobe for 80 series
D0
Parallel Data 0
D1
Parallel Data 1
D2
Parallel Data 2
D3
Parallel Data 3
D4
Parallel Data 4
D5
Parallel Data 5
D6
Parallel Data 6
D7
Parallel Data 7
VSSB
Ground for internal VCC
VDD
Power Supply
NC
No connect
VSS
Ground
Pin No.
1
2
3
Name
CS#
RES#
BS1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Name
CS#
RES#
BS1
D/C#
Serial I/F
Description
Chip Select
Reset
Set to Low or connect to VSS
NC
High: Data in GDRAM
Low: Command
No connect
NC
No connect
SCLK
SDIN
NC
NC
NC
NC
NC
NC
VSSB
VDD
NC
VSS
Serial Clock Input
Serial Data Input
No connect
No connect
No connect
No connect
No connect
No connect
Ground for internal VCC
Power Supply
No connect
Ground
OSRAM
Seite/ Page :5/(22)
3.2.3
Absolute Maximum Ratings:
Table 3.2.3: Absolute Maximum Ratings
Symbol
Description
Range
Unit
VDD
Supply Voltage for logic
-0.3 to +4.0
V
VCC
Supply Voltage for driver
0 to +16
V
VSS-0.3 to VDD+0.4
V
Vin
Input Voltage
Top
Operating Temperature
-30 to +70
ºC
Tstg
Storage Temperature
-40 to +70
ºC
3.2.4
DC Characteristics of Complete Module:
(-20°C to +70°C Temperature Range, except as noted)
Table 3.2.4: Recommended DC Operating Conditions
Description
Symbol
Logic operating voltage
VDD
OLED driver input voltage
VDD Operating Current
VCC
IDD
VCC Operating Current
Min.
Typ.
Max.
Unit
Note
2.4
3.0
3.5
V
1
2.7
3.0
3.5
V
2
12
12.5
13
V
-
-
650
µA
1
-
-
139
mA
2
17
18
20
mA
1
-
-
N/A
mA
(All pixels ON, Luminance at typical
value)
ICC
Driver Sleep Mode Current (at 25°C)
ISL
-
-
5.0
µA
High
VIH
.8 *VDD
-
VDD
V
Low
VIL
0
-
.2*VDD
V
High (IOH=-.5mA)
VOH
.9 *VDD
-
VDD
V
Low (IOL=.5mA)
VOL
0
-
.1*VDD
V
Logic input voltage
Logic output
voltage
1
2
Note 1: For p/n with external VCC
Note 2: For p/n with internal VCC (built-in DC-DC converter)
OSRAM
Seite/ Page :6/(22)
3.2.5
AC Timing Characteristics:
3.2.5.1 Parallel Interface Timing Characteristics:
Table 3.2.5.1: Parallel Interface Timing Characteristics
Description
Symbol
Min.
Typ.
Max.
Unit
tcycle
300
-
-
ns
Address Setup Time
tAS
0
-
-
ns
Address Hold Time
tAH
0
-
-
ns
Write Data Setup Time
tDSW
40
-
-
ns
Write Data Hold Time
tDHW
15
-
ns
Read Data Hold Time
tDHR
20
-
ns
Output Disable Time
tOH
-
-
70
ns
tACC
-
-
140
ns
120
-
ns
-
ns
Clock Cycle Time
Access Time
Chip Select Low Pulse Width (read)
Chip Select Low Pulse Width (write)
Chip Select High Pulse Width (read)
Chip Select High Pulse Width (write)
PW CSL
PWCSH
160
60
60
Rise Time
tR
-
-
15
ns
Fall Time
tF
-
-
15
ns
tFRM
70
75
85
Hz
Frame Frequency
Figure 3-2: Parallel Interface Timing Diagram for 68 Series MPU
OSRAM
Seite/ Page :7/(22)
Figure 3-3: Parallel Interface Timing Diagram for 80 Series MPU
3.2.5.2 Serial Interface Timing Characteristics:
Table 3.2.5.2: Serial Interface Timing Characteristics
Description
Symbol
Min.
Typ.
Max.
Unit
tcycle
300
-
-
ns
Address Setup Time
tAS
0
-
-
ns
Address Hold Time
tAH
0
-
-
ns
Chip Select Setup Time
tCSS
40
-
-
ns
Chip Select Hold Time
tCSH
15
-
-
ns
Write Data Setup Time
tDSW
20
-
-
ns
Write Data Hold Time
tDHW
-
-
70
ns
Clock Low Time
tCLKL
-
-
140
ns
Clock High Time
tCLKH
100
-
-
ns
Rise Time
tR
-
-
15
ns
Fall Time
tF
-
-
15
ns
tFRM
70
75
85
Hz
Clock Cycle Time
Frame Frequency
OSRAM
Seite/ Page :8/(22)
Figure 3-4: Serial Interface Timing Diagram
3.2.5.3 Duty Cycle:
The pixel rows are multiplexed and will operate at a nominal duty cycle of 1/64. The
default duty cycle is 1/80. During initialization a software command must be used to set
the required duty cycle.
3.2.5.4 Power Consumption:
(VDD= 3.0V, VCC = 12.5V, Frame Frequency = 75 Hz for power dissipation, unless
otherwise stated)
OSRAM
Seite/ Page :9/(22)
Table 3.2.5.4: Power Consumption
Display Mode
Maximum
Maximum
Power (mW)
Power (mW)
External
Internal VCC
VCC
0.002
0.012
Power Save mode (Sleep mode)
Conditions
Oscillators and pixel drivers halted
MPU I/F active
All pixels ON @ max brightness
216
290
100% on @100 cd/m²
10% ON @ max brightness
23
36
10% on @100 cd/m²
10% ON @ reduced brightness
6
12
10% on @15 cd/m²
2% ON @ reduced brightness
4
7
2% on @15 cd/m²
3.3
Display Programming
3.3.1
Programming:
Refer to specification: Solomon SSD0323 OLED/PLED Segment/Common Driver with
Controller CMOS
3.3.2
Initialization:
After power up, the commands specified in Table 3.3.2.1 must be executed during
initialization.
Table 3.3.2.1: Initialization Sequence
Command
Code
Default on POR
00H
3FH
00H
4FH
Initialization
xx = 00 & 10
00H
2FH
00H
3FH
Initialization
xx = 01
00H
2FH
00H
3FH
Initialization
xx = 20 & 21
00H
2FH
00H
3FH
Set Column Address
15H
Set Row Address
75H
Set Contrast Control
Set Current Range
Set Re-map
Set Display Offset
Set Multiplex Ratio
81H
N/A
A0
A2
A8
40H
Quarter
00H
00H
4FH
33H (~40%)
Full (86H)
52H
40H
3FH
33H (~40%)
Full (86H)
52H
40H
3FH
33H (~40%)
Full (86H)
52H
40H
3FH
Set DC-DC Converter
Set DC-DC Bias
Current
Set Phase Length
Set Row Period
AD
CF
03H
F0H
02H (disabled)
F0H
02H (disabled)
F0H
03H (enabled)
70H
B1
B2
Set Clock Divide
B3
P1 = 3, P2 = 5
25H
(K = 37 decimal)
02H
22H (P1 = 2, P2 = 2)
46H
(K = 70 decimal)
41H
22H (P1 = 2, P2 = 2)
46H
(K = 70 decimal)
41H
22H (P1 = 2, P2 = 2)
46H
(K = 70 decimal)
41H
Set VcomH
Set VP
Set VSL
Set Gray Scale Table
BE
BC
BF
B8
11H
18H
0EH
All 1
00H
0BH
0DH
See Table 3.3.2.2
Below
00H
0BH
0DH
See Table 3.3.2.2
Below
00H
0BH
0DH
See Table 3.3.2.2
Below
OSRAM
Seite/ Page :10/(22)
Table 3.3.2.2: Sample Gray Scale Settings (Decimal)
GS level
L0
L1
3.3.3
Phase 1
2
2
Phase 2
2
2
S/W Set
0
1
GS
Pulse
0
1
Total
DCLK
4
5
L2
L3
L4
L5
L6
2
2
2
2
2
2
2
2
2
2
1
1
2
2
2
3
5
8
11
14
7
9
12
15
18
L7
L8
L9
L10
L11
2
2
2
2
2
2
2
2
2
2
3
3
4
4
5
18
22
27
32
38
22
26
31
36
42
L12
L13
L14
L15
2
2
2
2
2
2
2
2
5
6
6
7
44
51
58
66
48
55
62
70
Graphic Area Pixel Mapping:
Rows are designed in the interleave configuration. The COM re-map command allows for
proper orientation of the image displayed.
Table 3.3.3: Pixel Mapping
Display
Column
Row
Upper Left Corner
0
63
Upper Right Corner
95
63
Lower Left Corner
0
0
Lower Right Corner
95
0
Figure 3-5: Pixel mapping and glass design layout
OSRAM
3.4
Optical Characteristics: (Ta = 25°C, unless otherwise stated)
3.4.1
Summary:
Table 3.4.1: Optical Characteristics
Absolute Luminance
Contrast Ratio
Condition
Min.
Typ.
Max.
Unit
Pixel
θ =φ = 0°
90
100
140
cd/m²
CR
θ =φ = 0°
100
-
-
Direct Sun Light
1.05
-
-
θ =φ = 0°
-
-
+20
%
θ =φ = 0°
0.435
0.455
0.475
1931CIE
0.520
0.540
0.560
Brightness Uniformity
Chromaticity
Coordinates
Yellow
Green
x
y
-
Visible Flicker
θ =φ = 0°
-
None
-
-
Cross Talk
θ =φ = 0°
-
-
10
%
(Brightness variation of non-selected pixels)
3.4.2
Lifetime Characterisitics:
Lifetime is measured by luminance as a function of time; based on the display driven at
25°C with all pixels turned on at maximum (100%) brightness setting and duty cycle, until
reaching 50% initial luminance.
Table 3.4.2: Lifetime Characteristics
Parameter
Min.
Typ.
Max.
Unit
Luminance @10,000 hours
-
50
-
cd/m²
Note: Based on initial brightness = 100cd/m² typical
3.4.3
Polarizing Angle:
Polarizing
axis
45°
Retardation
axis
Figure 3-6: Orientation of OLED polarizer angle
3.5
Mechanical Characteristics:
3.5.1
Interconnections:
The display module should be electrically connected to a controller on the user’s board
through the 18-contact pad ZIF tail.
Recommended mating connectors: Molex: 52893-1890, HIROSE: FH12(A)-18S-0.5SH
OSRAM
Figure 3-7: Orientation of ZIF connector tail pin out
3.5.2
Module Mechanical Drawings:
The mechanical drawings shown in Figures 3-8, 3-9, and 3-10 are provided for reference.
OSRAM
Figure 3-8: Module drawing for parts with bezel (external VCC)
OSRAM
Figure 3-9: Module drawing for parts with no bezel (external VCC)
OSRAM
Figure 3-10: Module drawing for parts with bezel (internal VCC)
OSRAM
4.0
PRODUCT MARKING:
4.1
Part Label Marking:
Parts are marked as shown below in Figure 4 -1.
Figure 4 -1: Description of part label marking requirements
H 025X D Y Y W W
3mm
20 m m
M a r k i n g L e g e n d:
O S R A M F a c t o ry C o d e (5 c h a ra c t e rs )
la b e l
D a t e C o d e : D a y (D )/ Y e a r ( Y Y ) / P C W e e k (W W )
5.0
QUALIFICATION TESTING:
5.1
Qualification Tests:
For reference, the main qualification tests and test criteria done on the OLED module are indicated
below in Table 5.1.1 and 5.1.2, respectively.
Table 5.1.1: OLED Module Internal Qualification Tests
Test
High Temperature and Humidity
Bias (THB)*
Condition
Duration
60°C / 90% RH
250 hrs
70°C
336 hrs
Powered Temperature Cycle
(PTC)*
-30°C / 70°C; 30 min. dwell
time; 15 min. transition time
60 cycles
Thermal Shock (TSK)
-40°C / 85°C; 45 min. dwell
time; 15 sec. Transition time
100 cycles
Low Temperature Storage (LTS)
-40°C
336 hrs
High Temperature Storage
(HTS)
70°C
336 hrs
15kPa 25oC
16hrs
High Temperature
Operating (ELT)*
Low Air Pressure
LAT
(0.15bar)
Mechanical Vibration
10-58hz 0.75mm
10 sweeps per X,
58-150Hz 10g
Y, Z direction
1oct/min
Mechanical Shock
Mechanical Bump
11ms half sine
6 shocks per X, Y,
100g peak
Z direction
6ms half sine 40g
1000 bumps per X,
Peak
Y, Z direction
*Note 1: The modules are powered for these tests, with a standard OSRAM pattern (50% emission ratio)
OSRAM
Table 5.1.2: OLED Module Qualification Test Criteria
Acceptance Criteria (without polarizer):
Test Patterns for Powered Tests:
6.0
-
< 50% luminance loss after test
-
Checkerboard pattern
-
5 point luminance uniformity <20%
-
Inverse Checkerboard pattern
-
No mechanical failure
-
All pixels On
-
No electrical failure
-
All pixels Off
-
Pixel gap (initial + growth) < 80um
COSMETIC CRITERIA:
For more details please refer to Reference Document #A63850-M8600-D000-*-76G3: “Failure
Catalogue for OLED Display Glass Breaking and Excess Glass”.
6.1
Zone Definition:
Zone B
Zone A
Zone C
Zone A: Active Area, where the pattern will be displayed when voltage is applied
Zone B: Viewing Area, located inside the seal line
Zone C: Non-Viewing Area, located outside the seal area
Figure 6-1: Definition of Zones for Glass Defects
6.2
Glass Layout Overview:
y = distance from glass cap to glass edge
(contact pad width)
t = thickness of one glass substrate
y
t
Figure 6-2: Glass Layout
6.3
Inspection Requirements:
Samples shall be inspected from a 30cm viewing distance.
OSRAM
6.4
General Guidelines for Glass Defects:
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
Acceptable limit of total glass chips shall not exceed five.
Glass chips shall be judged by their size and location.
Part is rejected if distance between any two chips is < t.
No cracks are allowed.
Glass chips are categorized as shown in Figure 8-1 below:
y
OLED
t
Alignment mark
Chip on contact pad surface
Chip on back surface
Chip on center back surface
Chip on center front surface
Chip on front surface
Chip at front corner
Chip at back corner
Figure 6-3: Definition of types of glass chips
OSRAM
6.5
Glass Defect Inspection Criteria:
Table 6.5: Inspection Criteria for Glass Defects
No.
1
Item
Criteria
Chips on back surface
GLASS CHIPS
1. Chips on back
surface and
center back
surface
t
a
a
b
reject if:
a > 3mm
b > 1.1mm
c > 1.1mm
b
c
c
y
reject if epoxy
exposed.
Chip on center back surface
t
a
a
c
b
c
b
y
Chip on center front surface
2. Chips on center
front surface and
front surface
reject if:
a > 3mm
b > 1.1mm
c > =0.7mm
reject if
epoxy exposed
t
a
c
b
y
OSRAM
No.
Item
Criteria
2. (cont’d) Chips on
center front
surface and front
surface
Chip on front surface
reject if:
a > 3mm
b > 1.1mm
c > =0.7mm
t
a
b
reject if
epoxy exposed
a
b
c
c
y
3. Chips at back
corner
Chips at back corner
reject if:
a > 1.1mm
b > 1.1mm
t
reject if epoxy
exposed.
5. Chips at front
corner
a
b
Chips at front corner
reject if:
a > 0.7mm
b > 0.7mm
t
reject if epoxy
exposed
a
b
OSRAM
No.
Item
Criteria
Chips at contact pad corner
6. Chips at
contact pad
corner
reject if:
a > 1.1mm
b > 1.1mm
t
b
2
a
EXCESS GLASS
Excess Glass
ii
No excess glass is
allowed at all edges.
Rework excess glass if
ii, iii, iv, v < 0.2mm.
iv
iii
Reject if i > 0.1mm
i
v
OSRAM

Product Specification for Pictiva™ 96X64 OLED Module, Yellow

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