Technical Program

Preliminary Program - WCAS 2014
- Technical Sessions Wednesday, September 3rd
Sponsor Presentations I
Schedule: Wednesday – Afternoon
Room: Sergipe
Chair: TBD
14:40-16:00 (Each exhibitor has 13 minutes)
1. Anacom
2. National Instruments
3. FIEAM Amazonas
4. Brazil IP
5. Namitec
6. IMEC
Sponsor Presentations II
Schedule: Wednesday – Afternoon
Room: Sergipe
Chair: TBD
16:40-18:00 (Each exhibitor has 13 minutes)
1. Agilent
2. CAST
3. Heidelberg Instruments
4. Rhode & Schwarz
5. Menthor Graphics
6. EVGroup
Thursday, September 4th
Session 1 – Analog & RF & Mixed Signal
Room: Sergipe
Chair: Jader Alves de Lima
08:20-08:40
Systematic Design of a Two-Stage OTA Composed by FinFETs Based on the gm/ID Characteristic
Luiz Antônio da Silva Jr and Alessandro Girardi
08:40-09:00
Analog and RF IC Design Training at IC Brazil Program TC 1
Pedro Toledo, Jhon Caicedo, Helga Dornelas, David Cordova, Alonso Schmidt, Diogo Santana and Eric E. Fabris
09:00-09:20
PLL-Based Wide Tuning Range Frequency Synthesizer for Cognitive Radio Applications
Márlon Allan Lorencetti and Sergio Bampi
09:20-09:40
A RF IC Design-Based Simulation Methodology for Wirebonds Interconnects
Hercílio M. Cavalcanti and Leandro T. Manera
09:40-10:00
A Peak Detector for Radiation Detection using Current Mode Processing in CMOS Technology
Nobuo Oki and Helio Takai
10:00-10:20
A 3.7GHz to 8.8GHz Voltage-Controlled Oscillator with a Small KVCO Variation for Wideband Applications
Egas Henes Neto, Hamilton Klimach and Sergio Bampi
Coffee Break
10:20-10:40
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Sponsor Presentations III
Room: Sergipe
Chair: TBD
11:20-12:20
1. CEITEC
2. Synopsys
3. X-FAB
Sponsor Presentations IV
Room: Sergipe
Chair: TBD
Invited Talk - WCAS 1
14:00-14:40
A Programmable Logic as an Innovation Vehicle in the Industry
Fabio Petrassen de Sousa (Macnica DHW & Altera)
14:40-16:00
1. FreeScale
3. Palomar Technologies
2. Muneda
4. Altera Macnica DHW
Session 2 – CAD, Verification and Test
Room: Sergipe
Chair: TBD
Invited Talk - WCAS 2
16:20-17:00
Mixed-Signal Design – Simulation Planning, Modeling, & Advanced Verification Methodologies
William Dunham (Cadence Design Systems, Inc.)
17:00-17:20
Application of an Efficient Test Architecture for a Power Management Control Block
Douglas C. Foster, Marlon A. Lorencetti, Júlio L. da Silva Jr., Tito Burini, Alfredo Olmos and Marcelo Lubaszewski
17:20-17:40
Early Verification of the LBIST Support of an Automotive MCU
Ary Adilson M. Alvarado and Gustavo F. Dessbesell
17:40-18:00
Efficient Thermal Modeling Methodology for System-Level Thermal Exploration of 3D ICs
Cristiano Santos, P. Vivet, Nicolas Peltier and Ricardo Reis
Friday, September 5th
Session 3 – Digital and Industrial Applications
Room: Sergipe
Chair: TBD
08:20-08:40
Design of Asynchronous Controllers by Direct Mapping and Synchronous Specification
Duarte L. Oliveira, Tiago Curtinhas, Lester A. Faria and João Luis V. Oliveira
08:40-09:00
Implementation of CORDIC-Based Soft and Hard Demappers for a DVB-S2 Receiver
João A. B. R. Tardelli, Eduardo R. de Lima, Gabriel S. da Silva, Gerson S. de Brito, Denise C. Alves, Cesar G. Chaves and
Jacqueline G. Mertes
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09:00-09:20
A Synthesizable BCH Decoder for DVB-S2 Satellite Communications
Cesar G. Chaves, Eduardo R. Lima and Jacqueline G. Mertes
09:20-09:40
CAN Communication Interface for IoT
Frank Behrens, Antônio Maurício Brochi, Marcelo Marinho and Patrícia Elaine Domingues
09:40-10:00
Physical Design Analysis and Techniques Aiming Low-Power
Fábio Ramos, João Altermann, Guilherme Rohde, Daniel Ferrão, Marcos Hervé, Janaína Costa, Rafael Soares and
Marcelo Lubaszewski
Visit to Sponsors (Booths)
10:00-10:20
Coffee Break
10:20-10:40
Session 4 – SoC, NoC and Embedded Systems
Room: Sergipe
Chair: TBD
10:40-11:00
A Network Intrusion Detection Coprocessor: Software vs. Hardware Power Consumption Analysis
Paulo Cemin, Ricardo Jasinski, André França, Volnei Pedroni and Altair Olivo Santin
11:00-11:20
Dynamic Security for NoC-Based 3D-MPSoCs
Martha Johanna Sepúlveda, Guy Gogniat, Daniel Sepúlveda, Jean-Philippe Diguet and Marius Strum
11:20-11:40
On the Development of a Qt-based Multithread NoC Simulator
Eduardo Alves da Silva, Luiz Gustavo Metzger and Cesar Albenes Zeferino
Lunch
12:20-14:00
Coffee Break
16:00-16:20
Best Papers & Closing Ceremony
16:20-17:00
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