National Institute for Science and Technology Micro and

National Institute for Science and Technology
Micro and Nanoelectronic Systems
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Annual Activity Report
Apr 2013 – Mar 2014
Year Five
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FOREWORD
The organization, objectives and results obtained during the 5th year (April 2013 to March 2014) of the
NAMITEC Institute will be presented in this report.
The NAMITEC National Institute of Science and Technology is aimed at advancing the research and
development of intelligent micro- and nano-electromechanical systems for use in sensor networks and embedded
and self-adjusted systems, among others. Applications include precision agriculture, environmental protection,
energy processing, biomedical instrumentation, automotive and aerospace industries, and telecommunications.
Within this context, the main goals of this project are the research and development of (a) systems-on-chip and
sensor networks, (b) design/test methodology and EDA tools for low-power and fault tolerant analog, RF, and
digital integrated circuits, (c) micro- and nano-electromechanical, photo- and optoelectronic devices as well as
integration and packaging processes for MEMS and NEMS, (d) materials and processes for the fabrication of
micro- and nano-integrated devices and circuits.
This project is a follow-up of the previous NAMITEC projects of the “Millennium Institute Program”, during
both its phases, the first from 2001 to 2005 and the second from 2005 to 2008. It includes both some ongoing
activities from the previous project as well as a set of new activities in promising research areas such as graphene
electronics, organic solar cells, and new sensors. NAMITEC is inserted into the Brazilian industrial policy aimed
at developing the semiconductor industry. Specially, NAMITEC provides an interaction between academia and
industry, adding to initiatives such as SIBRATEC (Brazilian Technology System), the IC-Brazil Program and
contributing to the development of human resources. Researchers of the NAMITEC group, affiliated with
several nationwide education and research institutions, work on a wide spectrum of disciplines such as Physics,
Chemistry, Computer Science, Electrical/Electronics Engineering, and Farming and Cattle Raising
(EMBRAPA). Our team is composed now of 124 researchers, 46 of which are CNPq researchers, from 25
institutions in 13 states covering the 5 Brazilian geographic regions. Noticeable is the affiliation of a
considerable number of emerging groups from the north and northeast of the country, in this way contributing to
the development of research in these areas.
Our group cooperates with several international and national research teams and companies. The longtradition international cooperation of our institutions along with strong ties with local companies demonstrate the
effort of our group in transferring knowledge and providing support to the industrial development of our nation.
NAMITEC has his head-quarter located at CTI in Campinas and is managed through a committee composed
of 5 members: Jacobus W. Swart – coordinator, from UNICAMP (former director of CTI), Raimundo Freire,
vice-coordinator, from UFCG, Altamiro Susin, from UFRGS, Linnyer Ruiz, from UEM and Nilton Morimoto,
from USP. The activities are organized in 8 areas, each with a specific coordinator, as indicated in the report.
Results of each of these areas will be detailed. In April 2014, the director of CTI requested the secretary of
NAMITEC for other duties, without an equivalent replacement. Adriana Nishimura served as the secretary of
NAMITEC for 5 years, with very high quality of work. This change in institutional support is affecting the
readiness and/or quality of information for this report and will also affect somehow the administration for the
coming year of NAMITEC.
This year was planned to be the last year of the project. However, due to delay for the new call in the INCT
program, it was suggested by CNPq to apply for an extension of one year to the present project, without offering
additional budget. This fact, in addition to the delay of CAPES in offering additional fellowships after the first
three years of the project has brought to a shortage of fellowships for NAMITEC. After last October, all our DTI
fellowships by CNPq were interrupted and only a limited number of IC fellowships could be maintained, until
August 2014. This lack of fellowship is affecting negatively the productivity of some of our activities.
Jacobus W. Swart
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Coordinator
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SUMMARY
A1 AREA – Wireless sensor networks (WSN) .................................................................................................................. 7
A1-1 Ecologic WSN .............................................................................................................................................................. 9
A1-2 WSN applied to farms and agriculture ambient parameters monitoring................................................................ 10
A1-3 SOC for WSN ............................................................................................................................................................. 13
A2 AREA - Design and characterization of Integrated Circuits ....................................................................................... 16
A2-1 Electrical characterization and fault-tolerant circuits .............................................................................................. 17
A2-2 RF integrated circuits ................................................................................................................................................ 18
A2-3 Mixed and analog circuits for sensors interface ....................................................................................................... 20
A2-4 Digital circuits and systems ...................................................................................................................................... 25
A2-5 Nanoelectronics Circuits ........................................................................................................................................... 27
A3 AREA – Electronic Design Automation - EDA ............................................................................................................ 28
A3-1 Computer aided design and layout of analog circuits that are robust to process variations and occupy minimum
silicon area .............................................................................................................................................................................. 29
A3-2 Placement and routing for ICs .................................................................................................................................. 30
A3-3 Automatic synthesis of integrated circuit layouts at transistor network level ......................................................... 31
A3-4 Hierarchical and 3D NOCS for MPSoC....................................................................................................................... 33
A3-5 Reliability and testability .......................................................................................................................................... 35
A4 AREA – Semiconductor devices ................................................................................................................................ 37
A4-1.1 ISFET (ion sensitive field effect transistor) ............................................................................................................. 38
A4-1.2 Polymeric nanofibers ............................................................................................................................................. 39
A4-1.3 Chemical sensors for detection of hydrogen and acetylene .................................................................................. 41
A4-1.4 SOI FINFET (3D) transistor as a hydrogen sensor .................................................................................................. 42
A4-1.5 Organic sensors based on polymer ........................................................................................................................ 44
A4-2.1 Photometry and imaging in the THZ spectral range .............................................................................................. 46
A4-2.2 Position sensitive photo detector .......................................................................................................................... 47
A4-3.1 Development, fabrication and characterization of microelectromechanical sensors ........................................... 48
A4-3.2 Development of photoacoustic spectrometer with silicon pressure chip with application in nanoparticles and
energy ..................................................................................................................................................................................... 50
A4-3.3 SAW sensors based on carbon nanotubes ............................................................................................................. 51
A4-4 Alternative photovoltaic and organic electronics ..................................................................................................... 52
A4-5 Broadband loop antenna over a slot ground plane fed by vias and CPW ................................................................ 53
A5-1 Nanostructured carbon materials ( Carbon nanotubes and thin sheets of graphene/graphite) .............................. 56
A5-2 Sintesis and characterization of nanostructured materials based on Si, Ge, III-V and II-VI semiconductors for
optoeletronics devices application ......................................................................................................................................... 57
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A5 AREA – Materials and fabrication techniques .......................................................................................................... 55
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A4-6 Microelectronic packaging ....................................................................................................................................... 54
A5-3 Synthesis and characterization of alternative materials for MOS ............................................................................ 59
A5-4.1 Biomolecules deposition on metallic substrates for research and development of BioMEMS .............................. 60
A5-4-2 Synthesis and characterization of organic materials for biochemical sensors. ..................................................... 61
A6 AREA – Human resources development ................................................................................................................... 63
Coloquia on micro and nanoelectronics ............................................................................................................................ 63
Organization of shor courses ............................................................................................................................................ 64
Organization of conferences ............................................................................................................................................. 65
A7 AREA – Technology transfer to industrial sector ...................................................................................................... 66
Cooperation with companies ............................................................................................................................................ 66
A8 AREA – Knowledge transfer to society ..................................................................................................................... 68
Web site and press releases .............................................................................................................................................. 68
NAMITEC workshops ......................................................................................................................................................... 70
Exhibitions ......................................................................................................................................................................... 71
Participation at scientific conferences .............................................................................................................................. 71
Obtained Awards .............................................................................................................................................................. 72
NAMITEC network management and summary ............................................................................................................... 73
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Productivity indicators ...................................................................................................................................................... 74
A1 - WIRELESS SENSOR NETWORKS (WSN)
The National Institute of Science and Technology
(INCT) NAMITEC project main objective is to carry out
major research and development of integrated and
intelligent Micro and Nanoelectronic systems. State-ofthe-art research on WSNs (Wireless Sensor Networks)
applications has been directed to precision agriculture,
environmental
control,
energy,
biomedical
instrumentation,
automotive,
aerospace
and
telecommunications.
Equipment
featuring
communication, home and office automationl have
spread all over the human activities. Namitec Area A1
have been restructured in this phase. Area A1 has three
activities that in fact group several related actions: A1.1
Ecological WSN; A1.2 Agricultural WSN; and 3)
Development of nodes and System-on-a-Chip for WSN.
The Areas activities are summarized hereafter.
II. A1.1 - ECOLOGIC WSN
The focus of this activity is in the environmental
monitoring by using Wireless Sensor Networks. In
particular, we focus on Urban ecology. This is a subfield
of ecology which deals with the interaction between
organisms in an urban or urbanized community, and their
interaction with that community. Urban ecologists study
trees, rivers, sustainable home, wildlife and open spaces
found in cities to understand the existence of those
resources and the way they are affected by pollution,
over-development and human-caused environmental
changes.
The energy is a primary concern in Wireless Sensor
Network . Thus, energy is an important issue that should
be optimized by application developer as well as, the
hardware design must be ultra low power. One way to
study the energy consumption and the behavior of the
application is to simulate its execution. In this activity
we are developing novel modules for the MannaSim, a
simulator for WSN and a toolchain for UNB-RISC16
processor, called M-Toolchain. The set of toolchain
components includes a port of both GCC and GNU
Binutils tools, and two novel tools that traditional
toolchain doesn´t provide, a tool to analyze the source
code and provide the developer information about the
structure of its code, and a tool to estimate the energy
consumption of the developed application, called Eprof.
Four SW systems are under registration as software
products called: Manna-X, crème, MannaSim and
Toolchain for UNB-RISC16. The framework ADRIX
was developed to support the design of WNSs. This
framework guides and assists the designer in the WSN
construction. An ordered and structured sequence of
steps that must be performed during the design,
development until network implementation is presented.
ADRIX is now registered computer program under
number “BR 51 2013 001083 7”.
III. A1.2 - AGRICULTURAL LIVESTOCK WSN
This activity concentrates on the application and
development of wireless sensor networks for agricultural
and livestock aiming either irrigation control or animal
tracking and monitoring.
A wireless sensor network applied to monitoring and
controlling the level of soil moisture in precision
agriculture was developed. Several measuring
substations (nodes) can be distributed in a plantation area
and being interconnected using a ZigBee protocol-based
network, in order to transmit the soil moisture
measurements and other constants, to a central
monitoring station. Additionally, we developed a system
to capture solar energy to charge batteries and power
each sensor node.
The main actions and results obtained from the execution
of this task are: 1) Low-cost wireless sensor network for
gas emission monitoring in farming; 2) Development of
the wireless sensor network using the ZigBee protocol,
operating at 2.4 GHz, with low power consumption and
low cost; 3) Development of solar powered smart charge
system using microcontrolled DC-DC converter to
improve de batteries useful life; and 4) Development of
the Monitoring Software to control the WSN and
monitor the soil moisture, batteries charge and allow an
improved network maintenance.
Considering the different technologies involved in WSN
applications, we have developed a middleware, called
Manna-x, in order to integrate some technologies. We
have also developed some applications using different
sensor nodes platforms in order to evaluate their
performance.
A1.3 – System-on-Chip for WSN
Area A1.3 is in charge of the many aspects of the design
and the development of WSNs nodes and circuits. Nodes
are used to implement solutions and are manufactured
using off the shelf circuits and components. Several
nodes communicate by means of their wireless channel
and the set of nodes are connected by using protocols
according to the application requirements: low power,
flexibility, mobility, latency, etc. A new version of the
Namimote node is available with a new firmware version
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I. INTRODUCTION
As a concept proof, we are develop an Ubiquitous
Healthcare environment (UHE) and a Amphibian
Monitoring. About UHE, an application of elderly
monitoring was developed considering the home
instrumentation with wireless sensor networks
technology, the clothes manufacturing with wearable
computing technology, as well as application of concepts
of Social Sensing and Internet of Things. As a concept
proof some prototypes were developed using free
hardware, as well as the Arduino LilyPad platform,
others prototypes using MicaZ sensor nodes and
accelerometers in Android smartphones.
About
Amphibian Monitoring, we are developing a solution of
Sensor Web for use in ecology multimedia. This solution
will be comprised of Wireless Multimedia Sensor
Networks (WMSN) organized in layers and composed of
sensor nodes with different sensing capabilities.
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Prof. Dr. Altamiro A. Susin (UFRGS), Area A1 leader
Profa. Dra. Linnyer Ruiz (UEM), Area A1.1 leader
Prof. Dr. Raimundo C. S. Freire, (UFCG), A1.2 leader
Prof Dr. Altamiro A. Susin, (UFRGS), Area A1.3 leader
with new features like GPS, SD card, etc and control
functions for on board peripherals.
The SoC is beeing developed in a memory-centric
approach for applications that need a large number of
modules. In fact, a SoC/MPSoC is composed by several
processing components as multiple processors and
hardware modules and this work also covers the design
and implementation of memory system architecture with
multichannel memory hierarchy. A multichannel
memory controller was developed to implement the
memory system architecture and was implemented in
FPGA with a 32-bit processor with the SPARC V8
architecture available from Gaisler Research. The
application is a set-top box compliant to the Brazilian
Digital Television Standard. The audio and video
decoders and the interface modules were also developed
and integrated to the system.
______________________________________________________
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Contact: Prof. Dr. Altamiro A. Susin,
[email protected], +55 51 3308 3136
A1.1 ECOLOGIC WSN
The focus of this activity is in the environmental
monitoring by using Wireless Sensor Networks. In
particular, we focus on Urban ecology. This is a subfield of
ecology which deals with the interaction between organisms
in an urban or urbanized community, and their interaction
with that community. Urban ecologists study trees, rivers,
sustainable home, wildlife and open spaces found in cities to
understand the existence of those resources and the way they
are affected by pollution, over-development and humancaused environmental changes. In this way, we are
identifying researches opportunities and developing
solutions for related questions about the hardware and
software designs.
New strategies to reduce energy consumption have been
deveopped considering WSN services: a case-based
resoning; a variable neighborhood; a clustering based
strategy; and a ant-system based strategy. Also strategies of
code optimization and the development of optimized
compilers that generate energy efficient programs. In fact,
the energy is a primary concern in Wireless Sensor Network
. Thus, energy is an important issue that should be optimized
by application developer as well as, the hardware design
must be ultra low power.
One way to study the energy consumption and the
behavior of the application is to simulate its execution. In
this activity we are developing novel modules for the
MannaSim, a simulator for WSN and a toolchain for UNBRISC16 processor, called M-Toolchain.
The set of
toolchain components includes a port of both GCC and
GNU Binutils tools, and two novel tools that traditional
toolchain doesn´t provide, a tool to analyze the source code
and provide the developer information about the structure
of its code, and a tool to estimate the energy consumption of
the developed application, called Eprof. This tool is a cycleaccurate instruction level simulator developed to estimate
the energy consumption of applications running on UNBRISC16 processor. Eprof is able to measure detailed timecritical phenomena, and can be used to shed new light on
design issues for large-scale sensor network applications.
Considering the different technologies involved in WSN
applications, we have developed a middleware, called
Manna-x. We have also developed some applications using
different sensor nodes platforms in order to evaluate their
performance. Four SW systems are under registration as
SOFTWARE PROGRAME REGISTRATION
ADRIX – A Framework for the Development of Intelligent
Networks, was registered and got the number “BR 51
2013 001083 7”.
MAIN PUBLICATIONS
Zoby, L. T. M ; CARVALHO, M. P. ; COSTA, J. C. ; Ruiz,
L. B. . HACBA: New Approach to Hierarchical Routing for
Wireless Sensor Network. InternationalJournalof Computer
Applications, , v. 64, p. 38 - 42, 15 fev. 2013.
MENDONCA, R. D. ; Silva, Thais R.M.B. ; SILVA, F.
Aguiar ; RUIZ, Linnyer Beatrys ; LOUREIRO, A. A. F.
Dynamic Bandwidth Distribution for Entertainment
Vehicular Networks Applications. In: 2nd International
Workshop on Pervasive Internet of Things and Smart Cities,
2014, Victoria. International Workshop on Pervasive
Internet of Things and Smart Cities, 2014.
Contact: Linnyer Beatrys Ruiz ([email protected]/ (44)
9832 57
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ACTION AND RESULTS
software products called: Manna-X, crème, MannaSim and
Toolchain for UNB-RISC16.
The framework ADRIX was developed to support the
design of WNSs. This framework guides and assists the
designer in the WSN construction. An ordered and
structured sequence of steps that must be performed during
the design, development until network implementation is
presented. ADRIX is now registered computer program
under number “BR 51 2013 001083 7”.
As a concept proof, we are develop an Ubiquitous
Healthcare environment (UHE) and a Amphibian
Monitoring. About UHE, an application of elderly
monitoring was developed considering the home
instrumentation with wireless sensor networks technology,
the clothes manufacturing with wearable computing
technology, as well as application of concepts of Social
Sensing and Internet of Things. A several wireless devices
with the ability of sensing, processing and communication
are embedded in clothing, artifacts, furniture, appliances and
buildings allowing instrument and control the environment
by facilitating the care with older people. Simulations, using
MannaSim and Eprof, were performed in order to evaluate
the proposed solution and assist in selecting parameters and
platforms to be used in the development of a real system. As
a concept proof some prototypes were developed using free
hardware, as well as the Arduino LilyPad platform, others
prototypes using MicaZ sensor nodes and accelerometers in
Android smartphones. About Amphibian Monitoring, we
are developing a solution of Sensor Web for use in ecology
multimedia. This solution will be comprised of Wireless
Multimedia Sensor Networks (WMSN) organized in layers
and composed of sensor nodes with different sensing
capabilities. We are designing an application for monitoring
of an ecological region using bioindicators. Frogs and toads
are environmental sensors that the slightest imbalance in
their habitat reduced reproductive capacity, and can observe
the rapid disappearance of populations. Thus, the application
will be developed will aim to classify the frogs by their
vocalizations and identify them in pictures.
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Prof. Dra. Linnyer B. Ruiz (Manna/UEM), activity leader
Prof. Dr. José Camargo da Costa (UNB), researcher
Prof. Dr. Antonio Alfredo Ferreira Loureiro, (UFMG)
Profa. Dra.Thais R.M.Braga Silva (UFV), collaborator
Prof. Fabricio A. Silva (PhD student UFMG)
Prof. César Silva (PhD student UFMG)
Leticia Maia (PhD student UFMG)
Maria Luiza Ghizoni (UEM), MsC student
Guilherme Couto (UEM), MsC student
Felipe A Cousin (UEM), scholarship at IC modality
Raphael Batistelli (UEM), scholarship at IC modality
Suelen Blasques Goes (UEM), scholarship at IC modality
João Marcus Velasques Faria,(UEM), scholarship at IC modality
Vitor Glauber Lopes, (UEM), scholarship at IC modality
Gustavo Luiz Feranandes, (UEM), scholarship at IC modality
A 1.2 WSN APPLIED TO FARMS AND AGRICULTURE
AMBIENT PARAMETERS MONITORING
Prof. Dr. Raimundo Carlos Silvério Freire (UFCG), activity leader
Prof. Dr. Cleonilson Protásio de Souza (UFPB), researcher
Prof. Dr. Francisco Marcos de Assis (UFCG), researcher
Livya de Lima Nunes (UFCG), undergraduate student
I. INTRODUCTION
This activity concentrates on developing of a wireless
sensor network (WSN) applied to a smart irrigation system.
In the plantation, the soil moisture is monitored and
controlled by a microcontroller system. The monitoring was
performed to adjust the soil moisture to an efficient level and
allow the optimal culture evolution. The system is selfpowered by a developed charge controller system that allows
the efficient and correct battery charging. In the developed
system, it was used commercial capacitive moisture
humidity sensors. This type of sensor supply an analog
voltage related to the dielectric constant variation of the
capacitor formed between the sensor and the ground in
accordance with the quantity of water present in the soil in
study. The communication between the sensors was
performed using a ZigBee based network. This activity
concentrates also on developing of a wireless sensor network
for monitoring of gas emission in agriculture, mainly, carbon
monoxide.
II.
SELF-POWERED WSN APPLIED TO SOIL
HUMIDITY MONITORING
This activity concentrates on developing of a wireless
sensor network (WSN) applied to a smart irrigation system.
In the plantation, the soil moisture is monitored and
controlled by a microcontroller system.
A.
Wireless Sensor Network Implementation
The wireless network was developed using the ZigBee
protocol, operating at 2.4 GHz, with low power consumption
and low cost. Two modules of this network can establish a
communication in the range of 1.6 km [1,2].
C. Moisture Sensor Calibration
The used commercial sensors are capacitive and they
relate the soil water content with an analog output voltage.
For a better accuracy, a calibration process is necessary. A
Monitoring Software Development
Software based on C# language is being developed to
control the WSN and monitor the soil moisture, batteries
charge and allow an improved network maintenance. An
example window of the developed software is illustrated in
Figure 1.
Figure 1 – Developed software screenshot
D. Experimental Tests
The experimental test was performed in the research
lab. In this test, two moisture sensors were properly
installed, as illustrated in Figure 2. Next, using the soil
moisture value as an irrigation control parameter, solenoid
hydraulic valves were actuated with the purpose of
maintaining a certain level of soil moisture in two points of
measurement. The experimental set for test is illustrated in
Figure 2.
B. Development of solar powered smart charge system
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Figure 2 – Installed sensor for laboratory tests and
experimental test.
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A solar powered charging system was developed using
microcontrolled DC-DC converter to improve the batteries
useful life. The developed system employs two methods to
identify the batteries full charge, the increase of the batteries
temperatures and the quick voltage rise and fall (∆V). For
this application, the batteries temperature increase
monitoring was a more effective solution
III.
WSN APPLIED FOR MONITORING OF GAS
EMISSION IN AGRICULTURE
The main actions and obtained results are described in
next sections.
A. Low-power wireless sensor node development
A low-power wireless sensor node was implemented
based on a Simple As Possible architecture which means that
the proposed sensor node only acquire signal and transmit it
to the next sensor node in the simplest way and complexity.
This node is called SAPmote and is based on the nRF24LE1
SOC from Nordic Semiconductor. According the
manufacturer [3], the nRF24LE1 is a highly integrated
System-on-Chip (SoC) that includes a 2.4GHz RF
transceiver core, an 8-bit CPU, and embedded flash memory
and some system peripherals. By offering a peak RX/TX
current lower than 11 mA, a sub-μA power down mode,
advanced power management, and 1.9 to 3.6 V supply range,
the nRF24LE1 provides a ultra low-power solution.
An experimental assessment of reached distances shows
that the maximum distance is about 300 m long using 3.2dBi
antennas, as shown in Fig. 3.
Figure 4 – (a) Energy harvester by Magnetic Induction
and (b) Energy harvester by thermoelectrical principles.
C. Carbon Monoxide sensor
For gas emission, test will occur with the commercial
sensor from Applied Sensor, the AS-MLC, a Carbon
Monoxide Sensor, shown in Fig. 5(a), packaged in a
standard TO-39 (solid TO-5), 4-pin header. According with
the manufacturer, it has high sensitivity to CO (0.5 to 500
ppm), very low power consumption (35 mW at 270 °C), long
lifetime, low cross sensitivity and long term stability.
Figure 5 – (a) Carbon Monoxide Sensor and (b) the
sensor node structure.
In order to power the sensor node it has been focus on
energy harvest techniques, mainly considering: magnetic
induction, when electrical grid are available on the field,
and thermoelectrical modules.
Fig. 4(a) shows the implemented energy harvester based
on magnetic field around power line in electrical grid
composed of the magnetic-core/coil set, the power managing
system, and the embedded system (sensor, processor unit
and radio). Considering energy harvester based on
thermoelectrical principles, it was developed a test platform
in order to assess thermoelectrical generators (TEGs), as
shown in Fig. 4(b). The Peltier modules generates the
temperature gradient ΔT to be applied on the TEG that, for
its turns, generates the ΔT-dependent voltage V.
Proposed Sensor node structure
Fig 5(b) shows the proposed sensor node structure based
on shields (individual PCBs) that serves for specific
applications, that is, there are shields for energy harvester,
for sensors and for the SoC. In this way, depending on the
application, it is choice the adequate shields.
CONCLUSIONS
The proposed system allows the improvement of crops
irrigation. The system operates autonomously, what reduces
de human activity. The most important goal of this project is
being achieved the savings in water, soil, mineral salts in the
soil and non-renewable resources.
The solar powered charge control system also increase
the batteries lifetime, and reduce the use of commercial
electricity.
A user-friendly software is being developed to allow the
WSN monitoring and control the system.
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B. Wireless sensor node energy harvester
D.
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Figure 3 – Distance x Transmission Power
REFERENCES
[1] FONSECA, N. S. S. M., E.C.T Macêdo, L. B. R. Romão, R.
C. S. Freire, Controlador de Carga Microcontrolado de Baixo
Consumo para Painéis Fotovoltaicos Aplicado a Rede de
Sensores sem Fio, IX Semetro, 2011.
[2] ARAGAO, Galba F., Sistemas para Aquisição e Controle de
Variáveis Ambientais em Instalações industriais para Frangos.
2009. Dissertação de Mestrado. Universidade Federal de
Campina Grande.
[3] nRF24LE1 2.4GHz RF System-on-Chip with Flash in
http://www.nordicsemi.com/eng/Products/2.4GHzRF/nRF24LE1.
[4] MIRANDA, Fábio R., SANTANA, Maria G.S., SOUZA,
Carmem C. M., OLIVEIRA , Cláudio H. C., Calibração do
sensor dielétrico ECH2O em dois tipos de sol. Rev. Ciên.
Agron., Fortaleza, v.38, n.3, p.317-321, Jul.-Set., 2007.
[5] DE SOUZA, C. P. ; VIEIRA, D. A. ; SANTOS, M. P. ;
Rodriguez, Y. P. M. ; MORAES JUNIOR, T. O. ;
CAVALCANTE, D. G. L. Energy harvesting for magnetic
dispersion: toroidal core study of iron powder obtained by
milling. In: 6th International Conference on Electroceramics
(ICE2013), 2013, João Pessoa. Proceedings of 6th International
Conference on Electroceramics , 2013.
[6] CARR, Lucas. SEVI ,Adam. GE ,Louis. Calibration of soil
moisture probes in saline conditions.
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Contact: [email protected]/ +55-83-2101 1447
A1.3 SOC FOR WIRELESS SENSOR NETWORKS
INTRODUCTION
The National Institute of Science and Technology
(INCT) NAMITEC project main objective is to carry out
major research and development of integrated and intelligent
Micro and Nanoelectronic systems. State-of-the-art research
on WSNs (Wireless Sensor Networks) applications has been
directed to precision agriculture, environmental control,
energy, biomedical instrumentation, automotive, aerospace
and
telecommunications.
Equipment
featuring
communication, home and office automation have spread all
over the human activities. Area A1.3 is in charge of the
many aspects of the design and the development of WSNs
nodes and circuits. Nodes are used to implement solutions
and are manufactured using off the shelf circuits and
components. Several nodes communicate by means of their
wireless channel and the set of nodes are connected to
develop protocols according to the application requirements:
low power, flexibility, mobility, latency, etc.
Area A1.3 develops also the System-on-Chip (SoC) to be
used as the main building block of future nodes. There are
several tasks each one charged to solve a different problem
of the development of a so complex circuit. Among these
tasks one can mention: development of IPs (Intellectual
Property), prototyping and testing of IPs on FPGA,
integration of IPs to build a SoC, design of silicon
prototypes of the SoCs, development of tool set for SoC, etc.
The node and the WSN developed with standard circuits are
valuable cases that help the specification of the SoC to be
designed.
ACTION AND RESULTS
In embedded multimedia systems it is preferred to use
DRAM memories as main data storage. DRAMs have large
storage capacity at lower price if compared to internal
SRAMs. A memory controller is used to interface with the
DRAM over a single memory port. Furthermore, multiclient and multi-channel support can be provided from a
single memory controller. Fig. 1 shows a block diagram of
the architectural implementation of the elements in the
proposed memory controller. Interfaces with clients are
composed by command and data buffers used to hold
temporary requests before be granted by the scheduler.
Atomic data transfers are supported with the use of buffers
implemented to hold command, address and data before to
complete a memory transaction. An arbiter and scheduler
module processes commands concurrently generated by the
clients’ buffers and interfaces with a memory IP controller
module. The arbiter classifies clients’ priority dynamically,
according to their deadline requirements and requested
transfer duration [2]. The arbiter sets the optimal transaction
granularity based on the clients’ accesses behavior. The
scheduler controls accesses to the memory channel from
priorities classification and the transaction length granularity
information, generated by the arbiter.
cii(0)
Client
(0)
cio(0)
cii(1)
Client
(1)
cio(1)
The first experience was based on the Zet processor. The
main interest of the ZET processor is software compatibility,
because it has the widely used X86 architecture. It supports
peripheral interfaces and it is possible to modify the
processor to meet the sensor node hardware requirements.
The initial sensor node SoC prototype was made using an
FPGA board communicating with a PC via a radio
frequency (RF) communication kit. Communication tests
was performed to validate the RF link between an MC1322x
network node, connected to the FPGA, and another one
connected to the PC. Beyond the RF link, a ADXL202
biaxial accelerometer from Analog Devices was integrated
to this system to characterize it as a sensor node.
aii(1)
Command
& Data aio(1)
Buffer
Clients'
Interface
cii(n)
A – SoC Development: the CPU
aii(0)
Command
& Data aio(0)
Buffer
Client
(n)
cio(n)
Stop-and-Wait
Protocol
ipi
IP Control
Module
ipo
LLMC
interface
aii
aio
aii(n)
Command
& Data aio(n)
Buffer
Sliding-Window
protocol
Arbiter
&
Scheduller
cmo
DDR3
interface
LLMC
(DDR3 IP)
clk
addr
cmd
data
The sensor node can be prototyped from the processor
and peripheral communication and interface IPs, integrated
into the same circuit. A running Network was implemented
and installed on a real application. Both approach have been
carried out and are described hereafter.
B – SoC Development: DRAM Controller
DDR3
SDRAM
cmi
Clients'
Monitor
Fig 1. Memory controller architecture with multi-client
support
C – SoC Development: Security on NoC based design
The concern for security is a significant factor in the
development of computer systems. Like all computer
systems, a SoC is also the target of security attacks. In a SoC
based on a NoC (Network-on-Chip), the network is the heart
of the system because it manages all the communication
among the cores and an attack to the NoC is critical. Adding
security mechanisms to the NoC can prevent attacks of one
task (the attacker) to another (the victim). The study
13
I.
The second implementation of a sensor node is being
developed from the Gaisler SoC platform with CPU Leon3
[2]. The LEON3 is a synthesisable VHDL model of a 32-bit
processor compliant with the SPARC V8 architecture. The
model is highly configurable, and particularly suitable for
system-on-a-chip (SOC) designs. It is an advanced 7-stage
pipeline with hardware multiply, divide and MAC units,
separate instruction and data cache, SPARC reference MMU
(SRMMU) with configurable TLB and AMBA 2.0 AHB bus
interface.
Página
Prof. Dr. Altamiro A. Susin (UFRGS), activity leader
Profa. Dra. Linnyer Ruiz (UEM), researcher
Prof. Dr. Cesar Zeferino, researcher
Prof. Dr. Ivan Saraiva, researcher
Prof. Dr. Marcio Kreutz, researcher
Dr. André Borin Soares (UFRGS), researcher
Alexsandro Bonatto (UFRGS), PhD student
identified that SoCIN is vulnerable to Denial-of-Service
attacks, which aim to reduce the available bandwidth of the
NoC or block some region or even the entire network. In
order to reduce these vulnerabilities, security hardwarebased mechanisms were implemented as two wrappers to be
placed between the cores and the network terminals. The
first wrapper regulates communication flows intending to
consume more bandwidth than a limit defined by the SoC
designer. The second wrapper identifies and drops malicious
flows that intend to block the network by sending a packet
with an incorrect destination address. This wrapper also
protects the system of masquerading attacks, dropping a
packet when it detects that the source node pretends to be
another node by sending a packet with an incorrect source
address. The proposed mechanisms resulted in a low impact
to the costs (4.1% in silicon and 2.5% in power dissipation)
and performance (1 clock cycle to the packet latency) of the
NoC. These mechanisms were proposed to protect a specific
NoC, but we consider that they could be applied to other
NoC with similar vulnerabilities.
E – Namimote - WSN based on Microcontroller
A new version of the Namimote node is available with
the new features: a) A new firmware version to control on
board peripherals (micro SD Card and AD converter) is
available; b) Centralized network management stack was
ported for Namimote, including micro SD card storage
capability; c) NMEA GPS protocol parser was developed,
for a WSN site survey project; d) Hardware revision
including new features is under development; e) Daughter
board, including new sensors for compression and humidity
acquisition is under development.
D – SoC Development: Ipnosys
The team at UFRN developed a 3D version of a
multiprocessor system called Ipnosys [3]. This architecture
implements an unconventional execution model for
instructions, based on packet forwarding. Instructions are
packet and instructions executed as packets travel through
execution units. In its original version the architecture
allows only thread level parallelism. The idea here was to
improve this kind of parallelism by adding one more layer to
the architecture, featuring a 3D architecture, as shown in Fig
2. As can be seen, inter-layer communications take place at
the corners in the so called Memory Architecture Unit
(MAU). The main challenges concern for control
mechanisms able to send and receive inter-layer data. At the
moment the implementation is being finished to start the
tests.
Fig 3. Namimote sensor node applied in greenhouse
monitoring.
The Namimote sensor nodes are being used in various
research and development activities . Recently it has been
employed in a project demanded by the department of
agronomy at UFRGS, where a wireless sensor network
consisting of Namimotes was used for ambience variables
data acquisition in greenhouses growing flowers ( Fig 3) .
The Namimotes received a firmware that performs the
acquisition of light, temperature and humidity at regular
intervals of one minute and sends them to a Namimote
acting as a collector, saving data on its on board memory
card. The collected data are analyzed by means of a
developed software, which is employed in studies aiming to
maximize the flowers productivity. In another application,
the Namimote was employed to work in conjunction with
other previously developed sensor node, with the aim of
acting as a communications tracker, capable of coexistence
detection in industrial wireless networks. In this
development , the local storage capacity of Namimote was
used in conjunction with its transceiver for LR- PAN
spectral sensing.
Fig 2. MPSoC
Página
[2] Bonatto, A.C.; Susin, A. A. “Run-Time SoC Memory
Subsystem Mapping of Heterogeneous Clients”. Circuits and
Systems (ISCAS), 2014 IEEE International Symposium on,
(Accepted for publication).
14
MAIN PUBLICATIONS
[1] SOARES, ANDRÉ BORIN ; BONATTO, ALEXSANDRO
CRISTÓVÃO ; SUSIN, ALTAMIRO AMADEU . Development of
a SoC for Digital Television Set-Top Box: Architecture and
System Integration Issues. International Journal of Reconfigurable
Computing (Print), v. 2013, p. 1-10, 2013.
[3] Sílvio Roberto Fernandes de Araújo. Projeto de Sistemas
Integrados de Propósito Geral Baseados em Redes em Chip –
Expandindo as Funcionalidades dos Roteadores para Execução de
Operações: A plataforma IPNoSys. Tese de Doutorado, DIMApUFRN, Março de 2012.
REFERENCES
[1] Gailser Leon 3 Processor. Online at: http://www.gaisler.com
Página
15
Contact: Prof. Dr. Altamiro A. Susin,
[email protected], +55 51 3308 3136
A2 DESIGN AND CHARACTERIZATION OF INTEGRATED
CIRCUITS
INTRODUCTION
A2-1 Electric characterization and radiation tolerant
circuits
This activity is conducted by researchers from Federal
University of Rio Grande do Sul in collaboration with
several institutions, such as the CTA-IEAv in São José dos
Campos-SP, as well as with partners from overseas, among
them Arizona State University and Texas Instruments (TI).
Three main topics are explored in the activity:
a)characterization of integrated circuits to propose electrical
models and simulation methodologies, intending to support
circuit designers; b) device level simulation of nano-scale
MOSFETS and c) characterization of radiation effects,
which aims at contributing to the Brazilian aerospace
industry development. Along the year, several MSc and
PhD thesis were defended, as well as a number of papers
were published, a few of them, in collaboration with the
partners. One important result of this collaboration in the
fifth year was reception of a silicon wafer containing casestudy circuits designed by UFRGS and fabricated by Texas
Instruments.
A2-2 RF Circuits
The main goal of this activity is to develop RF circuits to
support the communication of wireless sensor network
nodes. The area is divided in several tasks, some of them
grouping teams of different institutions. The team aims at
developing circuit design techniques capable of providing
very-low power consumption. They have explored different
methods and strategies of circuit design, such as bias current
reuse, MOSFET transistor in subthreshold operation, passive
voltage boosting, double positive feedback and techniques
devoted to multiband front-end circuits. In the last year, an
oscillator prototype designed in a standard 0.13 μm CMOS
process using a zero-threshold transistor was designed and
A2-3 Analog Circuits
In this activity, the main objective is to research and
develop analog and mixed circuits to interface with sensors
for various applications. Applications can be specific, such
as amplification of signals from microphones for hearing
implants, or generic, such as the definition of programmable
circuits seeking employment in sensor nodes in wireless
sensor networks. Along the year, several
important
contributions have been developed, among them a switchedcapacitor integrating A/D converter with programmable
resolution and input range fabricated in a standard CMOS
process, two architectures of programmable gain-integrating
amplifiers, a new architecture of a controlled-temperature
hot-wire anemometer using voltage feedback linearization, a
new analog implementation of a FSR model-based cellular
neural network, a RF rectifier, a low-voltage oscillator, a
power management integrated circuit and circuits for
interfacing extensometers for sensor networks applied to
structural health monitoring.
A2-4 Digital Circuits
This activity concentrates on the design and the
validation of digital circuits and systems to be used in the
Namitec network. In the last year, significant advances have
been observed in the design of IP Blocks for Automatic
Modulation Classification. At the same time, the topic
related to bird song classification was intensively
investigated and a number of machine-learning based
classification techniques were selected to form a dedicated
classification method. In addition, an off-line Built-In SelfTest (BIST) approach was implemented for global routing
resource testing of FPGAs
A2-5 Nanoelectronics
In this activity the researchers aim at developing new
circuits and systems based on nanoelectronic devices.
In the year, a nanoelectronic network-on-chip (NoC) core
based on single electron transistors was proposed. In
addition, a simple NoC architecture based on the proposed
NoC core was also evaluated.
Contact: [email protected] / +55 48 3721-6462.
16
I.
In the NAMITEC institute, an important group of
researchers design circuits and systems aiming at interfacing
transducers provided by the device team and the applications
developed by the application group.
The network was organized in 5 main technical activities:
A2-1 Electric characterization and radiation tolerant circuits;
A2-2: RF Circuits; A2-3: Analog and Mixed Circuits; A2-4:
Digital Circuits; A2-5: Nanoelectronic Circuits. Each activity
is composed of several tasks, executed by the teams
individually or in collaboration.
tested with the aid of probe station for on-wafer
measurements. The circuit sustained oscillations around 1.85
GHz from voltage supply starting at 56 mV. Moreover, a
dualband class AB power amplifier operating at 433/915
MHz was designed and evaluated based on multiresonant
circuits. In addition, a superregenerative amplifier operating
at the 400 MHz band was designed and fabricated in a 130
nm CMOS process.
Página
Prof. Dr. Fernando Rangel de Sousa (UFSC), A2 coordinator
Prof. Dr. Gilson Wirth (UFRGS), A2-1 leader
Prof. Dr. Fernando Rangel de Sousa (UFSC), A2-2 leader
Prof.Dr. Sebastian Yuri Catunda, (UFRN), A2-3 leader
Prof.Dr. José Luiz Guntzel (UFSC), A2-4 leader
Prof. Dr. José Camargo da Costa (UnB), A2-5 leader
A2.1 ELECTRICAL CHARACTERIZATION AND FAULT-TOLERANT CIRCUITS
INTRODUCTION
This document is intended to be a quick overview of the
research activity A2.1 – Caracterização Elétrica e Circuitos
Tolerantes à Radiação, performed by the group at the
Electrical Engineering Department and Informatics Institute
of the Federal University of Rio Grande do Sul – UFRGS.
Most of the research is carried out in a collaborative way,
with colleagues at UFRGS, from other Brazilian institutions
(as for instance CTA-IEAv in São José dos Campos, SP), as
well as with colleagues from overseas, as described below.
Here we describe the main results obtained in the period
from March 1st, 2013 to February 28th, 2014.
ACTION AND RESULTS
Research activities may be grouped into following
topics:
- Modeling and Characterization of Integrated Circuits:
This work is performed in collaboration with Arizona State
University, IMEC, Texas Instruments and NXP
semiconductors. The major goal of this work is to propose
electrical models and simulation methodologies, intending
to support circuit designers. Modeling of process variability
and aging is also investigated. We also applied our device
and circuit level results to improve circuit design [3].
Recently we received the wafer with case study circuits
designed by us and fabricated by Texas Instruments.
Currently we are working to improve our experimental lab
(partly financed by NAMITEC) and carry out the electrical
characterization work.
Main results from the last year are reported in [1,2].
Recently we established collaboration with NXP
semiconductors in Eindhoven.
- Atomistic Simulation: This work is performed in
collaboration with Arizona State University, among others.
It concerns device level simulation of nano-scale
MOSFETS. Currently we are transferring the code for
device level simulation from ASU to UFRGS, where there is
a PhD student (Vinicius V A Camargo) working on it to
improve the code, including new simulation capabilities
Fig. 1 – Picture of the 300nm wafer fabricated at TI.
related to noise and aging analysis.
[1] Bhaskarr Velamala, J.; Sutaria, K.B.; Shimizu, H.;
Awano, H.; Sato, T.; Wirth, G.; Yu Cao, "Compact
Modeling of Statistical BTI Under Trapping/Detrapping,"
Electron Devices, IEEE Transactions on , vol.60, no.11,
pp.3645,3654, Nov. 2013. doi: 10.1109/TED.2013.2281986
[2] Gilson Wirth, Yu Cao, Jyothi B. Velamala, Ketul B.
Sutaria, and Takashi Sato. “Charge Trapping in MOSFETS:
BTI and RTN Modeling for Circuits”, pp. 751-782. In: Tibor
Grasser (Org.), “Bias Temperature Instability for Devices
and Circuits”, Springer, 2013. ISBN 978-1-4614-7909-3.
[3] VASILESKA, D. ; ASHRAF, N. ; WIRTH, G. ; P
Srinivasan . Comparative Analysis of Mobility and Dopant
Number Fluctuation Models for the Threshold Voltage
Fluctuation Estimation in 45 nm Channel Length MOSFET
Device. In: James E. Morris, Krzysztof Iniewski. (Org.).
Nanoelectronic Device Applications Handbook. 1ed.New
York, USA: CRC Press, 2013, v. 1, p. 36-70.
[4] Azambuja, J.R.; Altieri, M.; Becker, J.; Kastensmidt,
F.L., "HETA: Hybrid Error-Detection Technique Using
Assertions," Nuclear Science, IEEE Transactions on, vol.60,
no.4,
pp.2805,2812,
Aug.
2013.
doi:
10.1109/TNS.2013.2246798
Contact: [email protected], +55 (51) 3308-4443.
17
I.
Prof Dragica Vasileska is scheduled for a 60 days stay
at UFRGS in July and August 2014, in the framework of the
CAPES PVE Program.
- Electrical Characterization of Radiation Effects:
Radiation Effects is a relevant topic in the development of
electronic components for the aerospace industry. Since
Brazil is pursuing efforts to develop this sector, we are
working in collaboration with the Brazilian Aero-Space
cluster (mainly located in Sao Jose dos Campos, SP, Brazil),
were our main partner is IEAv/CTA (Odair L Goncalez).
The main results are published in [4, 5]. We also have
designed and fabricated (in 130nm IBM technology) a Bulk
Built In Current Sensor (BICS) for SET detection. This
circuit is being tested at the at the Centre Microélectonique
de Provence's laser bench in Gardanne France by J M
Dutertre. Prof Jean-Max Dutertre has recently joined our
efforts on this activity.
Besides research work, we contributed to human
resources qualification. Among these activities, we can cite:
- Two (3) PhD Thesis finished in the last year related to
this activity (A2.1).
- Eight (6) MSc Thesis finished in the last year related to
this activity (A2.1).
- Several BSEE Thesis (“Projetos de Diplomação”)
carried out related to the research work here presented.
- Student exchange with partner institutions, as for
instance Mauricio B Silva who is at NXP semiconductors,
Eindhoven, NL, from October 2013 to September 2014;
Vinicius V A Camargo, who is at ASU from September
2013 to March 2014; and many short duration research
missions between UFRGS and IEAv/CTA (Sao Jose dos
Campos) to carry out the collaborative research work.
Faculty, researchers and students were involved.
MAIN PUBLICATIONS
Página
Prof. Dr. Gilson Wirth, activity leader
Prof. Dr. Luis Fernando Ferreira, researcher
Prof. Dr. Tiago Balen, researcher
Profa. Dra.Fernanda G L Kastensmidt, researcher
Prof. Dr. Ricardo Reis, researcher
Prof. Dr.Marcelo Soares Lubaszewski, researcher
A2.2 RF INTEGRATED CIRCUITS
Prof. Dr. Fernando Rangel (UFSC), activity leader
Prof. Dr. Robson Nunes de Lima (UFBA), researcher
Prof. Dr. Raimundo C. Silvério Freire (UFCG), researcher
Prof. Dr. Vincent Bourget (UFRN), researcher
Prof. Dr. José Camargo da Costa (UnB), researcher
Prof. Dr. Wilhelmus Van Noije (EPUSP),
Karolinne de Brito (UFBA), PhD student
Carlyle Câmara Júnior (UFSC), MSc student
Rafael Barreto Lopes (UFBA), undergraduate student
Rodrigo Rottava (UFSC), undergraduate student
I.
INTRODUCTION
Currently there are several standards for the wireless
communications systems for short distances, eg, Bluetooth
and ZigBee standards. They were originally designed to
operate over short distances (<100 m) and with advanced
features, such as transmission techniques based on
frequency-hopping spectrum spread (FHSS) and capability
of operation in network. But all this at the expense of high
current consumption (~ 30 mA) which can be excessive for
other applications (biotelemetry), which demand, instead,
very short range (<2m), simplicity, unidirectional
communication (simplex) and lower power consumption.
Thus, particular architectures or special circuit techniques
should be used to further reduce the power consumption of
the RF front-circuits.
Figure 1 – Microphotography of the ultra-low-voltage
oscillator and measurement results
As for the dualband power amplifier, we designed and
evaluated a 433/915 MHz class AB discrete power amplifier
based on multiresonant circuits. The Fig. 2 illustrates this
amplifier and the single-band counterparts’ measurement
results. The super-regenerative receiver consists basically of
an RF oscillator that is repeatedly powered on and off by a
low-frequency quench generator. The circuit designed
incorporates a low-noise amplifier, an oscillator, and an
envelope detector, besides a differential-to-single converter
between the last two. The layout is shown in Fig. 3, and the
post-layout simulation indicates that the prototype operates
around a center frequency of 487 MHz. This project
demonstrates the advantage of such a technique to design
low-power and high-sensitivity receivers.
This work in turn aims at developing circuit design
techniques capable of providing very-low power
consumption and design of very low-power front-end
circuits, such as oscillators, amplifiers, filters and mixers.
To conduct this work, we have considered the MICS
(Medical Implant Communications Service) standard
specifications as our targets.
ACTION AND RESULTS
Figure 3 – Microphotograph of the superregenerative receiver
18
In this context, we have designed, implemented and
evaluated, colpitts oscillators through double feedback[1];
dualband passband filters, power amplifiers based on
multiresonant networks [2] and a super-regenerative receiver
[3]. This oscillator is based on a classical common-gate
Colpitts, but with additional positive feedback provided by
an inductive gate degeneration. This increase in the positive
feedback decreases the required transconductance necessary
to start-up the circuit, which is used here to reduce the
minimum supply voltage. A prototype with the aim of
validating the work was developed in a standard 0.13 μm
CMOS process using a zero-threshold transistor. The circuit
was tested with the aid of probe station for on-wafer
measurements and we could verify the oscillator sustained
oscillations around 1.85 GHz from voltage supply starting at
56 mV. Fig. 1 illustrates the Microphotograph of the ultralow-voltage oscillator.
Figure 2 – Dualband band amplifier
Página
In order to reduce the power consumption of targeted
circuits, we have explored different methods and strategies
of circuit design, such as bias current reuse, transistor
subthreshold operation, passive voltage boosting and double
positive feedback [1]. We have also evaluated circuit design
techniques devoted to multiband front-end circuit in order to
design a biband MICS transceiver.
MAIN PUBLICATIONS
1- SILVA, F. G. S; DE LIMA, R. N. ; FREIRE, R. C.
S.; Plett, C.; A Switchless Multiband Impedance
Matching Technique Based on Multiresonant
Circuits; IEEE Transactions on Circuits and
Systems. II, Express Briefs, v. 60, p. 417-421, 2013.
2- Rottava, R., Câmara, C. , Sousa, F. R. and de Lima,
R. N, Ultra-low-power 2.4 GHz Colpitts oscillator
based on double feedback technique,
IEEE
International Conference on Electronics, Circuits,
and Systems ISCAS 2013.
REFERENCES
[1] RODRIGO ROTTAVA, CARLYLE CÂMARA
JUNIOR, FERNANDO RANGEL AND ROBSON N.
DE LIMA, “ULTRA-LOW POWER 2.4 GHZ
COLPITTS OSCILLATOR BASED ON DOUBLE
FEEDBACK TECHNIQUE”, ISCAS 2013;
[2] SILVA, F. G.; DE LIMA, R. N.; FREIRE, R.C.S.;
PLETT,
C.
A
SWITCHLESS
MULTIBAND
IMPEDANCE MATCHING TECHNIQUE BASED ON
MULTIRESONANT
CIRCUITS;
IEEE
TRANSACTIONS ON CIRCUITS AD SYSTEMS. II,
EXPRESS BRIEFS, V. 60, P. 417-421, 2013
[3]
MONCUNILL-GENIZ,
F.
X.;
PALÀSCHÖNWÄLDER, P.; MASCASALS, O. A GENERIC
APPROACH TO THE THEORY OF SUPERREGENERATIVE
RECEPTION.
IEEE
TRANSACTIONS ON CIRCUITS AND SYSTEMS I:
REGULAR PAPERS. V. 52, N.1, P.54-70, JAN.2005
Contact: [email protected] / Tel.: +55-483721-6462
Página
19
[email protected] / 55 71 3283 9764
A2.3 MIXED AND ANALOG CIRCUITS FOR SENSORS INTERFACE
Prof. Dr. Sebastian Yuri Cavalcanti Catunda, activity leader
INTRODUCTION
This activity relates to the research and development of
analog and mixed circuits to interface with sensors for
various applications. Applications can be specific, such as
amplification of signals from microphones for hearing
implants, or generic, such as the definition of programmable
circuits for use in sensor nodes in wireless sensor networks.
In this theme, related to analog and mixed circuits, include
theoretical research; circuit design libraries and IP, and
development of integrated circuits and discrete systems for
validating architectures.
The activity is subdivided into several tasks, and each
task has a local coordinator and team. The main results
from the tasks are presented here.
TASKS
A. Task 1. Switched-capacitor integrating A/D converter
with programmable resolution and input range
Prof. Dr. Antonio Petraglia (UFRJ), task coordinator.
Prof. Dr. Sebastian Yuri Cavalcanti Catunda (UFRN), researcher.
Thiago Brito Bezerra (UFRJ), M.Sc. student.
An ADC whose input range is adjusted to the signal
level of the sensor output in order to avoid amplification
stages in a signal conditioning circuit was developed, using
methodologies proposed in [14, 15]. For this adjustment, the
input of the converter should be programmable, in order to
make it more compatible with various sensors with different
characteristics. The developed ADC also allows the
configuration of the converter resolution, enabling the
designer to exploit trade-offs between resolution and
conversion speed for a given application [1]. The circuit,
whose layout is shown in Figure 1, has been fabricated in a
0.35 m CMOS process. The ADC has a capacitor matrix
formed by 0.1 pF unit capacitances. The adjustment of the
ADC dynamic range are given as Γ1={1, 1.5, 2, 3, 4, 6, 8,
12, 16} for a resolution of 8 bits. The ADC test board has
been designed, shown in Figure 2, and a computer program
is currently being developed for carrying out the automated
tests.
Figure 2. Programable ADC IC Layout.
B. Task 2. Measurement system with programmable
excitation and conditioning for sensor nodes
Prof. Dr. Sebastian Yuri C. Catunda (UFRN), task coordinator.
Prof. Dr. Fernando Rangel de Souza (UFSC), researcher
An Architecture of a programmable gain integrating
amplifier was proposed and published in the IEEE I2MTC
2013 [ 2]. A second architecture, shown in Figure 3, based on
the previous one, that replaces the resistor by a switched
capacitor was proposed an accepted to be published on the
IEEE I2MTC 2014. The purpose is to compare both
architectures in terms of performance and adequacy for
integration. The circuits operate using two clock phases for
sampling and amplification and the gain is defined by the
ratio between the pulse-width of a control signal and the
integrator time constant, which is defined by a resistor and
capacitor. The proposed architecture has also configuration
switches that enable its use in the modes differential, direct
single-ended or with DC adjustment and calibration.
Figure 3. Proposed circuit architecture.
C. Task 3. Anemometers architectures with controlled
temperature and sensitivity
D. Task 5. Analog circuitry for modeling retinal functions
Prof. Dr. Ana Isabela Cunha (UFBA), task coordinator.
Página
Figure 1. Programable ADC IC Layout.
A new architecture of a controlled-temperature hot-wire
anemometer using voltage feedback linearization was
proposed and a Master’s dissertation was completed. The
voltage feedback linearizes the sensor input-output
relationship and the controller is designed to achieve null
steady-state error and reduce the system response time. The
proposed architecture was submitted and accepted to be
published on the IEEE I2MTC 2014.
20
Prof. Dr. Sebastian Yuri C. Catunda (UFRN), task coordinator.
Prof. Dr. Raimundo Carlos Silvério Freire (UFRN), researcher.
We have proposed a new analog implementation of a
FSR model-based CNN (Cellular Neural Network) [5, 6].
Architectural premises have been used to reduce circuit
complexity, leading to a compact network with low-power
consumption, as verified in simulation results.
Transient simulation of a CCD template using the
proposed CMOS architecture of FSR cell revealed a
satisfactory performance regarding robustness and velocity.
Two-dimensional image processing has been illustrated
through the simulation of the following functions: border
extraction, corner detection, hole filling, shade projection
(Figure 4), two-dimensional CCD. The expected final states
have been achieved with enough resolution within a short
period of time.
A 8 x 8 array of the proposed FSR cell circuit has been
fabricated in IBM 0.13 m CMOS technology. This chip
also comprises an auxiliary mixed circuitry to convert serial
inputs or initial states into the 64 variables to be
simultaneously applied, and to read the 64 outputs in a serial
mode. Figure 5 illustrates the layout of a unique FSR cell,
including the sample-hold circuits for the input and output
signals. The experimental tests have just started.
It should be emphasized that the use of current signals to
synthesize
template
weights
allows
network
programmability in a continuous sense, thus providing a
high degree of flexibility to the analog implementation of
complex image processing operations.
-15 mV
-15 mV
0
0
+15 mV
+15 mV
Figure 4. Simulation results of shade projection using a 10 x 10
array of the proposed FSR cell circuit. Initial image in the left and
final image (after 14,5 s) in the right.
E. Task 6. Study and development of A/D converters
without clock
Prof. Dr. Raimundo Carlos S. Freire (UFCG) / Prof. Dr. Antonio
Augusto Lisboa de Souza (UFPB), task coordinators.
The circuit and layout of a full differential amplifier was
developed in the CADENCE to be used in the folding
Analog-to-Digital Converter and the circuit was sent to
fabrication in MOSIS. The folding ADC was developed in
the CADENCE using a 5-bit switched capacitor circuits and
it was sent to MOSIS for fabrication for being tested late on.
The ADC layout can be seen in Figure 6 [3, 4].
Figure 6. Folding ADC layout using 5-bit switched capacitor
circuits;
F. Task 7. Energy harvesting circuit for sensor nodes
Prof. Dr. Cleonilson Protásio de Souza (UFPB), task coordinator.
Prof. Dr. Raimundo Carlos S. Freire (UFCG), researcher.
Recently, energy harvesting based on magnetic induction
has gaining more and more attention because of their
promising performance in power grid since energy can be
harvested by the wasted magnetic field around power line
using the principle of electrical transformer. However, the
performance of the induction-based harvester presents very
different results according to the magnetic core material
used. In this task, it was carried on experiments on
induction-based harvester considering the power density
achieved by different magnetic core materials.
Figure 7. Toroid-shaped magnetic cores evaluated.
21
Página
Figure 5. Layout of proposed FSR cell.
Considering a power line current of 5A, it was observed
that the nanocrystalline core has the higher power density
(=7828.00 µW/cm³), about 4 times the value of the ferrite
core (=1978.00 µW/cm³). With the iron powder, it was not
detected power generation. Table 1 shows a comparison of
the obtained results with other energy harvesting sources
presented in the references [11-13].
Figure 9. Schematic diagram of an N stage inductive ring oscillator.
TABLE I.
POWER DENSITY COMPARISON.
Energy Harvester
Ref.
Solar panel (outdoor conditions)
[22]
10,000µW/cm²
This task
7828µW/cm³
[22]
3500µW/cm²
Ferrite core
This task
1978µW/cm³
Shoe Inserts
[23]
330µW/cm²
Vibrations (piezoelectric)
[24]
200µW/cm³
Batteries (non-rechargeable lithium)
[24]
45µW/cm³
Ambient Radio Frequency
[25]
1 µW/cm²
This task
Negligible
Nanocrystalline alloy core
Thermoelectric generator (30° C)
Iron powder core
Power Density
Figure 10. Micrograph of the two-stage inductive ring oscillator in
130 nm technology.
G. Task 10-11. Development of circuits for energy
harvesting
Prof. Dr. C. Galup-Montoro / Prof. Dr. M. C. Schneider (UFSC),
task coordinators. Y. Juppa, M. B. Machado (UFSC), Researchers.
This research is focused on the design and prototyping of
ultra-low-voltage building blocks that can operate from
supply voltages as low as the thermal voltage. We have
designed several building blocks, some of which are
described here. We designed and tested 3 integrated ac/dc
converters including LC-matching network that operate
from RF signals at around 900 MHz. The ac/dc converters
are comprised of 18, 24, and 36 diode connected zero-VT
transistors, 38 nH (Q10) inductors, and 100 fF
compensation capacitors. Experimental results for the output
voltage versus frequency are shown in Figure 8. Note that
the output voltage is relatively constant for a bandwidth of
the order of 100 kHz. We have also designed a two-stage
inductive ring oscillator (IRO), whose scheme is shown on
Figure 9, that operates from supply voltages of less than 50
mV. The micrograph of the inductive ring oscillator (IRO)
using zero-VT transistors together with the oscillatory
signals at the drain and source voltages are shown in Figures
10 and 11 [7-10].
Figure 11. Experimental waveforms at the buffer outputs for
VDD=45.3 mV.
H. Task 14. Integrated Circuit Design of Power
Managent Units (PMUs)
Dr. José Carlos da Silva (CTI), task coordinator.
Wellington R. Melo (CTI), Wilmar B. Moraes (CTI), Cristian
Hamanaka (CTI), Felipe Castro (CTI), Claudionor Santos (CTI),
Jair Liz de Emeri (CTI), Luiz Alberto C. Almeida (CTI), Ronald
Chacon (CTI), William Ishikawa, researchers.
This project consists in the development of Power
Management Units (PMUs) to be employed in mixed-signal
integrated circuits (IC), particularly Systems On Chip
(SOCs), aiming its use on Wireless Sensor Network (WSN)
applications [18 - 21].
Figure 12 shows a PMU module comprised of a DC-DC
converter of type buck-boost and six LDO linear converters
for different current capacities. Figure 13 presents the layout
of the PMU designed with DC-DC converter core, LDO and
switching modules. In Figure 14 are presented the sequence
of operation of the loads (DC-DC converter core and
LDO’s).
Figure 12. Power Management Unit (PMU).
Página
22
Figure 8. Measured dc output voltage vs. frequency for the
designed ac/dc converters.
the samples compared to commercial acquisition systems ,
such as the Lynx ADS200.
MAIN PUBLICATIONS
I. Task 15. Circuits for interfacing extensometers for
nensor networks applied to structural health monitoring
Dr. Aldebaro Klautau (UFPA), Task coordinator.
The circuits were designed for acquisition and
transmission data from sensors to a Structural Health
Monitoring System. The current design supports
accelerometers,
strain
gages,
thermocouples
and
displacement sensors. The design may be divided into three
modules: signal handling, A/D converter and the transmitter
module.
The converter and handling modules can work with four
different gains providing an effective operating range for the
sensors. The A/D converter module uses ADS1194 – Texas
Instruments for converting samples from the sensors with
200 SPS and 16-bits per sample. Table 1 shows the
resolutions specified for each supported sensor.
Table 1 – Measuring capacity of the circuits.
Sensor
Resolution
Accelerometer
0,001 - 10
Strain gage
0,1 - 6000
Thermocouple -25º - +85º
LVDT
1
Unit
G
microstrains
Celsius
mm
Two transmission modules were developed, one wireless
and another wired. The wireless transmission module is
based on the Radio Module deRFmega128 and transmits the
data obtained from the sensors to a wireless network at a
rate of 250kbps using the ZigBee PRO Feature Set
Compliant Platform. Another module uses data transmission
through a CAN bus. This allows the circuitry to work for
long periods when the battery life of wireless modules are
shorter than the period of use of the system because, along
with the CAN bus, there are wires for powering the sensor
nodes.
The circuits were used in tests with real structures, such
as a bridge for pedestrians at the Federal University of Pará,
and accomplished results in a range of less than 5% error in
REFERENCES
[14]
CATUNDA, S. Y. C. ; NAVINER, J. F. ; DEEP, G. S. ;
FREIRE, R. C. S. Designing a programmable analog signal
conditioning circuit without loss of measurement range, in:
Instrumentation and Measurement. In: IEEE Transactions, vol
52, number 5, pages 1482-1487, ISSN 0018-9456, 2003.
[15]
SOARES, C.F.T. PETRAGLIA, A., “Automatic
placement of identical unit capacitors to improve capacitance
matching,” IEEE Int. Symposium on Circuits and Systems,
2009, pp. 1739-1742.
23
Figure 14. Sequence of Operation as application
Página
Figure 13. Layout of Power Management Unit (PMU)
[1] BEZERRA, T. B.; NUNES, R. O.; CATUNDA, S. Y. C.;
PETRAGLIA, A.; e FREIRE, R. C. S, “Transistor Level
Design of a Switched Capacitor Integrating ADC with
Programmable Input Range and Resolution”, in Iberchip XVIII
Workshop 2012.
[2] A. P. Figueiredo, M. S. de Deus, S. Y. C., and F. R. de Sousa,
“Pulse-width programmable gain integrating amplifier,” in
Instrumentation and Measurement Technology Conference
(I2MTC), 2013 IEEE International, 2013, pp. 1812–1816.
[3] COSTA, W. E. M., RODRIGUES, S. A., FREIRE, R. C. S.,
CATUNDA, S. Y. C. , Sousa, F. R. 8-bit Folding ADC Based
on Switched Capacitor. In: 2013 IEEE International
Instrumentation and Measurement Technology Conference
(I2MTC), 2013, Minneapolis. p. 1559-1563.
[4] COSTA, W. E. M., RODRIGUES, S. A., FREIRE, R. C. S.,
CATUNDA, S. Y. C., Sousa, F. R., SILVA, T. L., CASTRO,
M. S. A Folding ADC Based on Switched Capacitor Circuits in
350 nm CMOS. In: TC-4 Symposium on Measurements of
Electrical Quantities - IMEKO, 2013,
[5] SANTANA, E. P. ; FREIRE, R. C. S. ; CUNHA, A. I. A. A
Compact Low-Power CMOS Based Analog FSR Model-Based
CNN. JICS. Journal of Integrated Circuits and Systems, v. 7, p.
72-80, 2012.
[6] SANTANA, E. P.; Circuitos Analógicos em Tecnologia CMOS
para Implementação de Próteses Retinianas. Doctoral Thesis,
Universidade Federal da Bahia, jun. 2013.
[7] A. J. Cardoso, L. G. de Carli, C. Galup-Montoro, and M. C.
Schneider, “Analysis of the rectifier circuit valid down to its
low-voltage limit,” IEEE Transactions on Circuits and Systems
I: Regular Papers, vol. 59, no. 1, pp. 106 - 112, Jan. 2012.
[8] C. Galup-Montoro, M. C. Schneider, and M. B. Machado,
“Ultra-low-voltage operation of CMOS analog circuits:
amplifiers, oscillators, and rectifiers,” IEEE Trans. on Circuits
and Syst. II, Exp. Briefs, vol. 59. no.12, pp. 932-36, Dec. 2012.
[9] M. B. Machado, M. C. Schneider, C. Galup-Montoro,
“Analysis and design of ultra-low-voltage inductive ring
oscillators for energy-harvesting applications,” 4th Latin
American Symp. on Circuits and Syst. (LASCAS), Cusco, Peru,
Feb. 2013.
[10] M. B. Machado, M. C. Schneider, C. Galup-Montoro, “On the
minimum supply voltage for MOSFET oscillators,” IEEE
Transactions on Circuits and Systems I: Regular Papers, vol.
61, no. 2, pp. 347 - 357, Feb. 2014.
[11]
MORAES JUNIOR, T. O. ; Rodriguez, Y. P. M. ;
SOUZA, C. P. . Energy Harvesting Based on Magnetic
Dispersion for Three-Phase Power System. Energy and Power
Engineering, v. 05, p. 20-23, 2013.
[12]
Oliveira, T. ; Rodriguez, Y. P. M. ; SOUZA, C. P. .
Sistema de Captação de Energia através de Ruído Magnética de
Linha de Potência. In: IBERCHIP XIX WORKSHOP, 2013,
Cusco. Proceedings of 2013 IBERCHIP XIX WORKSHOP,
2013.
[13] Oliveira, T. ; Rodriguez, Y. P. M. ; SOUZA, C. P. .
Experimental Results on Magnetic Cores for Magnetic
Induction-Based Energy Harvesting. In: 19th IMEKO TC-4
Symposium Measurements of Electrical Quantities, 2013,
Barcelona. Proceddings of 19th IMEKO TC-4 Symposium
Measurements of Electrical Quantities, 2013.
[16] CHUA, L. and YANG, L. Cellular neural networks: theory.
IEEE Transactions on Circuits and Systems, 35(10):1257–
1290, 1988.
[17] ESPEJO, S., CARMONA, R., DOMINGUEZ-CASTRO, R.,
and RODRIGUEZ-VAZQUEZ, A. A VLSI-oriented
continuous-time CNN model. International Journal of Circuit
Theory and Applications, 24(3):341–356, 1996.
[18]
Z.-H. Shen and H. Min, Combination method of DC-DC
converter and LDO to improve efficiency and load regulation,
Electronics Letters, Vol. 47, No. 10, 12th May 2011.
[19]
Maxim Innovation Delivered, Power solutions for
enterprise management, Edition 1. June 2010.
[20]
Ken Marasco, How to Apply Low-Dropout Regulators
Successfully, Analog Dialogue 43-08 Back Burner, August
(2009).
[21]
Chester Simpson, Linear and Switching Voltage
Regulator Fundamentals, National Semiconductors.
[22]
Y. K. Tan, S. K. Panda, Energy Harvesting From Hybrid
Indoor Ambient Light and Thermal Energy Sources for
Enhanced Performance of Wireless Sensor Nodes, IEEE
Transactions on industrial electronics, vol. 58, pp. 4424-4435,
September 2011.
[23]
N. S. Shenck, J. A. J. Paradiso, Energy scavenging with
shoe-mounted piezoelectrics, IEEE Micro, vol. 21, pp. 30-41,
May-June 2001.
[24]
S. Roundy, P.K. Wright, K.S. Pister, Micro electrostatic
vibration-to- electricity converters, Proceedings of the ASME
Internacional Mechanical Enginnering Congress and expo,
November 2002.
[25]
E. M. Yetman, Advances in power sources for wireless
sensor nodes, Proceedings of international workshop on
wearable and implantable body sensor networks, Imperial
college, pp. 20-21, April 2004.
Página
24
Contact: Sebastian Yuri C. Catunda. ([email protected])
A2.4 DIGITAL CIRCUITS AND SYSTEMS
Prof. Dr. José Luís Güntzel (UFSC), activity leader
Prof. Dr. Luiz Cláudio V. dos Santos (UFSC), researcher
Prof. Dr. Aldebaro B. Rocha Klautau (UFPA), researcher
Prof. Dr. Adalbery Castro, (UFPA), researcher
Dr. Renan Alves Fonseca, (UFSC), researcher
Prof. Dr. Ivan Saraiva Silva (UFPI), researcher
Prof. Dr. Cleonilson Protásio de Souza (UFPB), researcher
Prof. Dr. Ricardo Pezzuol Jacobi (UnB), researcher
I.
INTRODUCTION
This activity focuses the design and validation of digital
circuits and systems to be used in the Namitec Project. The
specific requirements of the Namitec applications, such as
high performance and high energy efficiency, are taken into
account in the design.
ACTION AND RESULTS
Within the frame of the INCT-Namitec Project, the
development of IP blocks for classification initially
addressed the problem of Automatic Modulation
Classification (AMC), to which the use of Support Vector
Machine (SVM) theory was showing to be very promising.
Therefore, in the last year a significant advance was
achieved in such subject, mainly regarding signal modeling
and robustness of the method. Those advances are reported
in section A. At the same time, the main target intended for
this activity (A2.4), bird song classification, was intensively
investigated and a number of machine learning-based
classification techniques was selected to form a dedicated
classification method, as reported in section B. The design
of other specific blocks planned for this activity is also
reported in the remaining of this document.
Figure 1 – Block diagram of the developed architecture
B. IP Blocks for Song Bird Classification
In bird song classification, we train a model using a
database of bird songs. This model should be able to identify
the bird species of new unseen records. In this work, we are
developing a hardware that can be configured with the
model parameters. The training phase of the model is done
offline in software. The first model developed consists of the
following data processing chain: (1) Fast-Fourier Transform,
(2) Principal Component Analysis, (3) k-means clustering
algorithm, (4) Signal histogram and (5) linear Support
Vector Machine. Steps 1 to 3 reduce the dimensionality of
the data; step 4 summarizes the statistics of a whole audio
record in a vector that can be further classified in step 5. In
Fig. 2, we show a record sample after being processed by
steps 1 (Original Spectrogram), 3 (Low Dimensional
Representation) and 4 (Histogram).
A. IP Blocks for Automatic Modulation Classification
Figure 2 – A record sample after steps 1, 3 and 4
The development of optimization and verification
techniques for the memory subsystem of systems-on-chip
led to two main results. First, a novel pre-silicon on-the-fly
verification technique was proposed to check if an electronic
system level design representation of a coherent multicore
system complies with a given shared-memory model
25
In a database of 650 records of 19 different species this
model infers the species correctly 67% of the cases. The best
results reported for this database are around 90%. One of the
weak points of this model is in the histogram procedure: in
this step the temporal information of the song is lost. We
conclude that the histogram+SVM module that was
successfully applied for automatic modulation classification
cannot deal with the complexity of bird songs. We are now
developing a model based on Restricted Boltzmann
Machines.
C. Memory Optimization and Verification
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In the context of cognitive radio and blind spectrum
sensing, automatic modulation classification (AMC) plays
an important role. In the scenario where transmitter and
receiver do not cooperate, the receiver does not know at
which baud rate the transmitter operates. Many classification
techniques proposed in literature consider the receiver is
obtaining the symbols in synchrony with the transmitter. We
propose a technique for automatic modulation classification
that does not depend on the prior knowledge of the
transmitter baud rate. We combine a linear Support Vector
Machine (SVM) with a two-dimensional histogram frontend, resulting in a very efficient implementation (Fig. 1).
This technique is suitable to implement in FPGA, and it can
be used in the context of a Software Defined Radio
hardware platform. In this work, we also introduced the 2-D
histogram, which presents higher accuracy than 1-D
histogram using slightly less hardware resources.
In the dataset and framework considered [1], some
configurations achieve almost 100% accuracy in a wide
range of SNR. These results are considerably better then
results found in literature.
defined for the programmer’s view. The proposed technique
was compared with two post-mortem checkers under 2400
scenarios for platforms with 2 to 8 cores. The results showed
that the new technique is at least 100 times faster than a
checker sampling a single sequence per processor and it
needs approximately 1/4 to 3/4 of the overall verification
effort required by a post-mortem checker sampling two
sequences per processor. The underlying algorithm, a few
theorems supporting its theoretical guarantees, and
experimental results were published in DATE 2013 [2].
Second, a novel prefetching-based optimization
technique was proposed for improving the energy-efficiency
of instruction caches while keeping real-time guarantees.
The technique was evatuate when optimizing all the 37
programs from the Mälardalen WCET benchmark for 36
cache configurations and two IC technologies. By exploiting
software prefetching on top of on-demand fetching, the
technique reduced the memory's contribution to the energy
consumption (by 11.%), to the average case execution time
(by 10%), and to the WCET (by 17%). The underlying
algorithm, a theorem supporting the theoretical claim, and
the experimental results were published at DAC 2013 [3].
D. Development of a self-test scheme for Acoustic WSN
REFERENCES / MAIN PUBLICATIONS
[1] R. Fonseca et al. “Robust and Low Cost Modulation
Classification Using SVM and Two-Dimensional Histogram,”
Submitted to the Analog Integrated Circuits and Signal Processing,
2014.
[2] L. S. Freitas, E. A. Rambo, L. C. V. Santos. On-the-fly
Verification of Memory Consistency with Concurrent Relaxed
Scoreboards. In: Design, Automation, and Test in Europe
Conference, 2013, Grenoble, França. Proceedings of the Design,
Automation, and Test in Europe Conference (DATE 2013), 2013.
[3] E Wuerges, L. C. V. Santos, R. S. Oliveira. Reconciling realtime guarantees and energy efficiency through unlocked-cache prefetching. In: ACM/IEEE Design Automation Conference, 2013,
Austin, Texas. Proceedings of the 50th ACM/IEEE Design
Automation Conference (DAC 2013), 2013.
[4] J. Yao, B. Dixon, C. Stroud, and V. Nelson, “System-level
built-in self-test of global routing resources in virtex-4 fpgas,” in
System Theory, 2009. SSST 2009. 41st Southeastern Symposium
on, 2009, pp. 29–32.
[5] B. E. Dixon, “Built-in self-test of the programmable
interconnect in field programmable gate arrays,” M. S. Thesis,
Auburn University, 2008.
Contact: [email protected] / +55 48 3721-6466.
Figure 3 – Developed FPGA-based test board
Página
26
It was implemented an off-line Built-In Self-Test (BIST)
approach for global routing resource testing of FPGAs. This
approach consists in programming some logic components
to create the following BIST structures: Test Pattern
Generators (TPGs) and Output Response Analyzers (ORAs),
which are used to test the Interconnect Under Test or Wires
Under Test (WUT). Experimental results were obtained on
an FPGA test platform based on a Spartan 3E FPGA
developed in the research as shown in Fig. 3. In order to
program the FPGA, it was developed a C-based program to
generate XDL (Xilinx Development Language) files for
routing specific and defined interconnects to run the BIST
which is used according the design flow given in Fig. 4. As
a result, the most relevant strategy for FPGA testing was the
cross-coupled parity dual counter [2][3], which is capable of
testing 6 WUTs per configuration on a Xilinx Virtex4
FPGA. The proposed approach is capable of driving and
analyzing 8 WUTs, all at once. In addition, experimental
results show that total fault coverage is obtained together
with identification of the fault interconnection.
Figure 4 – Flow for generating XDL from C-based programs
A2.5 NANOELECTRONICS CIRCUITS
Prof. José Camargo da Costa (UnB), activity leader
Profa. Dra. Janaina Gonçalves Guimarães (UnB), researcher
Prof.Stefan Michael Blawid ( UnB ), researcher
Prof. Alexandre R.S. Romariz ( UnB ), researcher
Dr. Martin Claus ( UT-Dresden Germany) , researcher
Beatriz dos Santos Pes (UnB), master student
Alex Yuzo Moroguma (UnB ), master student
Glenda Coimbra Santos (UnB ), undergraduate student
Dimas Lopes (UnB ), undergraduate student
Isabelle Vieira Silva (UnB ), undergraduate student
Carolina Cunha (UnB ), undergraduate student
Pedro Paulo Bispo de Oliveira (UnB ), undergraduate student
The SET-based NoC implementation, with a detailed view
of the mesh router, its power and area estimations and an
area comparison between nanoelectronic and CMOS routers
are shown below.
NoC Implementation
I. INTRODUCTION
The goal of this activity is developing new circuits and
systems based on nanoelectronic devices. In order to reach
that objective, this research involves: designing digital
circuits and new architectures, investigating the behavior of
those new circuits taking into account operating
temperature, developing applications and, finally, building
and characterizing nanoelectronic organic devices.
Area and Power estimations for a nanoelectronic
5-port mesh router
II. ACTION AND RESULTS
A completely SET( single electron transistor ) -based
network-on-chip (NoC) nanoelectronic core is proposed and
a simple NoC architecture based on that nanoelectronic core
is also evaluated. It is shown that the SET-based NoC has a
promising performance considering parameters such as
power consumption and area.
SET NAND Gate (building block)
Area comparison between nanoelectronic and
conventional 5-port 32bit mesh routers
III. MAIN PUBLICATIONS
1. PES, B. S. ; GUIMARAES, J. G. ; COSTA, JOSÉ CAMARGO
DA . NANOELECTRONIC SET-BASED CORE FOR
NETWORK-ON-CHIP ARCHITECTURES. IN: NANOTECH
2013, 2013, WASHINGTON. NANOTECHNOLOGY 2013:
ELECTRONICS,
DEVICES,
FABRICATION,
MEMS,
FLUIDICS AND COMPUTATIONAL, 2013. V. 2. P. 29-32.
IV. REFERENCES
1. A.S.Y POON, IEEE TRANSATIONS ON VERY LARGE
INTEGRATION SYSTEMS, VOL 15, NO. 3, 2007.
Contact: [email protected]/ phone: 55-61-99828417
27
Nanoelectronic Estimations (Area and Power)
The nanoelectronic realization of the NoC presents a
significant area reduction in comparison with CMOS ( 45nm
node ) counterparts. A 30 times reduction on the power
consumption is also expected for the SET-based NoC
realization.
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A SET-based NoC , inspired on the mesh-architecture
presented by Poon (1), was implemented. The area and
power consumption estimations for the circuit’s building
blocks and the overall figures for the complete network are
presented below.
A3 AREA ELECTRONIC DESIGN AUTOMATION – EDA
Prof. Dr. Ricardo Augsusto da Luz Reis (UFRGS), area
coordinator, A3-3 leader
Prof. Dr. Antonio Petraglia (UFRJ), A3-1 leader
Prof.Dr. Marcelo de Oliveira Johann, (UFRGS), A3-2 leader
Prof.Dr. Altamiro Susin (UFRGS), A3-4 leader
Página
28
Prof. Dr. Tiago Balen (UFRGS), A3-5 leader
A3.1 COMPUTER AIDED DESIGN AND LAYOUT OF ANALOG CIRCUITS
THAT ARE ROBUST TO PROCESS VARIATIONS AND OCCUPY MINIMUM
SILICON AREA
Prof. Antonio Petraglia (UFRJ), activity leader
Prof. Carlos Fernando Teodósio Soares (UFRJ), researcher
Thiago Valentin de Oliveira (UFRJ), IC student
I. INTRODUCTION
Various electronic circuits that play fundamental role in
instrumentations applications, such as filters, analog-todigital and digital-to-analog converters, require highly
accurate capacitance ratios [1]-[3]. Typically, capacitance
ratio errors must be smaller than 1% in those applications.
Therefore, it is very important to verify the accuracy of these
ratios after the integrated circuit (IC) is fabricated.
Fig. 1. IC Layout.
Based on previous work [2],[4], a new layout was carried
out to develop a switched-capacitor (SC) filter that is able to
verify the main theoretical reasoning therein described. This
new IC has two versions, one based on the use of a low-pass
filter and the other one on a high-pass filter. Both rely on the
following property: implemented with a structurally allpass
2nd-order filter, they produce a transmission zero (notch) at
a pre-defined frequency, which is a function of a capacitance
ratio CA/CB [4]. In this report we present the experimental
results obtained with the low-pass version.
(a)
Measurement results for the capacitance ratio of 3/7 are
shown in solid lines in Fig. 2, where the ideal frequency
response is in dashed lines. The filter operated at a sampling
frequency of 100,576 kHz, and hence the ideal notch
frequency is 36.834 kHz. The measured frequency responses
of 4 samples were 36.752 kHz (twice) and 36.880 kHz
(twice), whose errors, compared to the ideal value, were
−0.195% and 0.152%, respectively. These results verify the
high accuracy of the proposed capacitance ratio
measurement approach.
III. MAIN PUBLICATIONS
[1]
SOARES, C. F. T.; FILHO, A. C. M.; PETRAGLIA, A.
Optimizinng Capacitance Ratio Assignment for LowSensitivity SC Filter Implementation, IEEE Transactions on
Evolutionary Computation, v. 14, p. 375-380, 2010.
[2]
PETRAGLIA, A.; SOARES, C. F. T. “A Technique for
Accurate Capacitance Ratio Measurements in CMOS
Integrated Circuits”, XVI Ibership Workshop, 2010, Foz do
Iguaçú, Brasil, 2010, v. 1, p. 1-4.
[3]
M. J. McNutt, S. LeMarquis, and J. L. Dunkley, “Systematic
capacitance matching errors and corrective layout procedures,”
IEEE J. of Solid-State Circuits, vol. 29, no. 5, pp. 611–616,
May 1994.
IV. REFERENCES
[4] SOARES, C.F.T. PETRAGLIA, A., “Automatic placement of
identical unit capacitors to improve capacitance matching,”
IEEE Int. Symposium on Circuits and Systems, 2009, pp.
1739-1742.
Contact: [email protected]
29
Shown in Fig. 1, the chip was designed in a 0.35 m
CMOS process and its die area is 3.2 x 1.84 mm2. Each of
the two filters will be tested with 16 different matrices –
each group of 4 matrices has been implemented with
different ratios: 3/7, 1/2, 6/10 and 8/10. The matrices are
arranged in arrays 0.1 pF unit capacitors, and were
developed with different geometry configurations, including
common centroid and other layout alternatives [4], so that
influences of fabrication process errors on capacitance ratios
can be assessed. Parasitic capacitances produced by
crosstalk and crossover between signal paths have been
minimized by careful layout of interconnect wires and
capacitor arrays.
Fig. 2. Ideal (dashed line) and measured frequency responses of 4
samples of the fabricated chip: (a) entire frequency response; (b)
passband detail.
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II. ACTIONS AND RESULTS
(b)
A3.2 PLACEMENT AND ROUTING FOR ICS
Prof. Dr. Marcelo de O. Johann (UFRGS), activity leader
Prof. Dr. Ricardo A. L. Reis (UFRGS), researcher
Prof. Dr. José L. A. Güntzel (UFRSC), researcher
Guilherme A. Flach (UFRGS), PhD student
Gracieli Posser (UFRGS), PhD student
Tiago J. Reimann (UFRGS), PhD student
Jucemar Monteiro (UFRGS), MsC student
Leandro Nunes (UFRGS), MsC student
results (Fig. 2). The developed flow is also the first gate
sizing method to report violation-free solutions for all
benchmarks of the ISPD 2013 Contest.
I. INTRODUCTION
In this activity we cover the development, test and
validation of technologies for physical synthesis of
Integrated Circuits, with emphasis on placement and
routing. Ongoing research activities are under development
with the PlaceDL analythical placer and with new methods
to improve global routing. Discrete gate sizing has atracted
a lot of attention, generating new publications and the ISPD
contests organized by Intel in 2012 and 2013 [4]. In this
activity we developed new methods for discrete gate sizing
that outperform previously known results by significant
margins both in terms of quality and speed.
Figure 1 – Initial solution of an Analythical Placer
III. MAIN PUBLICATIONS
II. ACTION AND RESULTS
The next paragraphs summarize the developments in
placement, routing and discrete gate sizing.
A. Placement and Routing
Discrete gate sizing corresponds to the problem of
selecting, for each gate in the circuit, a combination of gate
width (w) and threshold voltage (Vt ) available in the library
such that timing is met and leakage power is minimized. In
the last year working it was developed a faster and more
effective approach using Lagrangian Relaxation (LR) [3]. In
the proposed flow, first, a solution without slew and load
violation is generated. Then, the LR method is used to
reduce leakage power and achieve timing closure while
keeping the circuit with no or few violations. A new greedy
heuristic solves the proposed LR formulation relying on
local information and global impact estimation. If the
solution given by LR produces a circuit with negative slack,
a timing recovery method is applied to find near zero
positive slack. The circuit is finally introduced to a power
reduction step. For the ISPD 2012 Contest benchmarks, the
leakage power of our solutions is, on average, 9.53% smaller
than [5] and 12.45% smaller than [6]. The sizing produced
using our approach achieved the first place in the ISPD 2013
Discrete Gate Sizing Contest with, on average, 8.78% better
power results than the second place tool. With new timing
calculation applied, this flow now provides, on average, an
extra 9.62% power reduction compared to the best Contest
[1] Nunes, L., Reis, R., Global Routing Congestion Reduction with
Cost Allocation Look-ahead, SBCCI2013, 26th Symposium on
Integrated Circuits and System Design, ACM Press, Curitiba,
September
2-6,
2013.
ISBN:
9781479911325,
DOI:
10.1109/SBCCI.2013.6644889.
[2] Nunes, L., Reimann, T., Reis, R., GR-PA: A Cost PreAllocation Model For Global Routing, In: IFIP/IEEE VLSISoC2013, International Conference on Very Large Scale
Integration, Istambul, Turkey, October 5-7, 2013..
[3] Flach, G., Reimann, T., Posser, G., Johann, G., Reis, R.,
Simultaneous Gate Sizing and Vth Assignment using Lagrangian
Relaxation and Delay Sensitivities, ISVLSI2013. IEEE Computer
Society Annual Symposium on VLSI, Natal, Brazil, 2013.
IV. REFERENCES
[4] M. M. Ozdal, C. Amin, A. Ayupov, S. Burns, G. Wilke, and C.
Zhuo, “An Improved Benchmark Suite for the ISPD-2013 Discrete
Cell Sizing Contest,” in ISPD 2013, Stateline, NV, US, p. 168–
170.
[5] J. Hu, A. B. Kahng, S. Kan, M.-C. Kim, and I. L. Markov.
Sensitivity-guided metaheuristics for accurate discrete gate sizing.
In Proc. ICCAD, pages 2012.
[6] L. Li, P. Kang, Y. Lu, and6H. Zhou. An efficient algorithm for
library-based cell-type selection in high-performance low-powe2r
designs. In Proc. ICCAD, pages 226–232, 2012.
Contact: [email protected] Phone +55(51) 33089493.
30
B. Efficient Algorithms for Discrete Gate Sizing
Figure 2 – Gate sizing results compared to second and third
places of ISPD 2013's Contest
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Analytical placers work by interleaving a linear solver
that optimizes quadractic atraction forces (Fig.1) and a
spreading process with dispersions forces. In the current
version of PlaceDL we are implementing new techniques for
look-ahead legalization and better exploring graphical
interfaces with cell coloring to compare different algorithms
and choices. A pre-allocation scheme was also developed as
an initial cost solution to improve Global Routing [1] [2].
A3.3 AUTOMATIC SYNTHESIS OF INTEGRATED CIRCUIT LAYOUTS AT
TRANSISTOR NETWORK LEVEL
Prof. Ricardo Reis (UFRGS), activity leader
Prof. Marcelo Johann (UFRGS), researcher
Adriel Ziesemer (UFRGS), PhD student
Gracieli Posser (UFRGS), PhD student
I.
INTRODUCTION
The traditional standard cell flow don't really takes care
of power minimization at physical level, because there is
a limited number of logical functions in a cell library, as
well a limited number of sizing versions. To obtain an
optimization at physical level, it is needed to use SCCG
(Static CMOS complex gates) that are not available in a
cell library. To have "freedom" in the logic design step,
it is needed an EDA set of tools to let the automatic
design of any transistor network (even with a different
number of P and N transistors). This can reduce the
amount of transistors needed to implement a circuit,
reducing power consumption, mainly leakage power that
is proportional to the number of components
(transistors). The flexibility of the approach can also let
the designers to define layout parameters to cope with
problems like tolerance to transient effects, yield
improvement, printability and DFM.
ACTIONS AND RESULTS
Figure 1 – Cell FAD1X9 generated with ASTRAN.
As ASTRAN tool can support transistor folding,
transistor sizing and other layout parameters.
III. SOME PUBLICATIONS IN 2013
[1] GUTHAUS, M., WILKE, G., REIS, R., Revisiting
Automated Physical Synthesis of High-Performance Clock
Networks, ACM TODAES - ACM Transactions on Design
Automation of Electronic Systems, Vol. 18, Issue 2, DOI:
10.1145/2442087.2442102, ISSN: 1084-4309, EISSN:15577309, March 2013.
[2] MEINHARDT, C., REIS, R., FinFET Basic Cells
Evaluation for Regular Layouts. In: Fourth IEEE Latin
American Symposium on Circuits and Systems – LASCAS
2013, Cusco, Peru, February 27- March 1, 2013, 4 p. ISBN:
978-1-4673-4897-3, DOI: 10.1109/LASCAS.2013.6519063
[3] REIMANN, T., POSSER, G., FLACH, G., JOHANN, G.,
REIS, R., Dimensionamento de Portas e Assinalamento de Vt
usando Fanin/Fanout e Simulated Annealing. In: WORKSHOP
IBERCHIP, 19 (IBERCHIP 2013). Cusco, Peru, 27 de
Fevereiro a 1 de Março de 2013. 4p., ISSN 2177-1286.
[4] REIMANN, T., POSSER, G., FLACH, G., JOHANN, G.,
REIS, R., Simultaneous Gate Sizing and Vt Assignment Using
Fanin/Fanout Ratio and Simulated Annealing. IEEE
International Symposium on Circuits and Systems,
ISCAS2013, Beijing, China, May 19-23, 2013. P. 2549-2552,
IEEE Press. ISBN 978-1-4673-5762-3
31
The traditional Standard Cell approach is widely used till
today and it is still a solution for large number of
designs. But to optimize the physical design for power
reduction, area reduction and performance, it is needed
to use a new approach. The number of different
functions that can be found in a typical cell library is
limited (in general not more than 150 different logic
functions). Cell sizing options are also limited in a cell
library. These limitations don’t allow obtaining a deep
optimization of a circuit at the physical design level. In
recent nanotechnologies, the circuit delay is mainly due
to the connections. It is important to find a way to reduce
the wirelength, as the connections are the central
problem in reducing delay. We can claim that the
traditional Standard Cell approach is far from
minimization of power consumption, number of
transistors, delay, wirelenght and area. To do a strong
physical design optimization we need to change the
physical design paradigm and to search for new physical
design approaches. We propose a new approach where
the cells are designed on the fly, during the physical
design step, considering fan-in and fan-out and a
minimization of the number of transistors. This approach
also means a change on the level of abstraction of the
physical design, because it is not anymore just a
placement and routing of cells, but a placement and
routing of any network of transistors, even with a
different number of N and P transistors. Static power is
increasing more and more as the features of the
transistors are being reduced. The static power
consumption is due to the increasing leakage current in
recent technologies. A way to reduce the static power is
to reduce the amount of transistors, as leakage is
proportional to the amount of transistors. For sure,
leakage is also function of many other parameters that
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II.
must be considered to reduce even more the static power
consumption. In our approach, a circuit is viewed at
physical level as a network of transistors. The tools can
generate automatically any network of transistors. There
is a change on the level of abstraction of the layout
synthesis. The transistors can have any size. If the W of
the transistor is bigger than the height of the respective
diffusion region, it is done a transistor folding. It is
available the first version for a 65 nm technology. It was
generated several cells for asynchronous circuits. The
cells generated with ASTRAN are more compact than
the ones generated by hand. The layout of Cell FAD1X9
generated with ASTRAN is presented in Fig. 1. The cell
density is improved because the tool is able to perform
automatically an internal routing using polysilicon and
metal wires with several doglegs
[5] FLACH, G., REIMANN, T., POSSER, G., JOHANN, G.,
REIS, R., Simultaneous Gate Sizing and Vth Assignment using
Lagrangian Relaxation and Delay Sensitivities, ISVLSI2013.
IEEE Computer Society Annual Symposium on VLSI, Natal,
Brazil, August 5-7, 2013.
[6] SANTOS, C., VIVET, P., DUTOIT, D., GARRAULT, P.,
PELTIER, N., REIS, R., System-Level Thermal Modeling for
3D Circuits: Characterization with a 65nm Memory-on-Logic
Circuit, 3DIC – 3rd IEEE , October 3-5, 2013, San Francisco,
USA
[7] TERRES, M., MEINHARDT, C., BONTORIN, G., REIS,
R., A Novel Approach to Reduce Power Consumption in Level
Shifter for Multiple Dynamic Supply Voltage, 20th IEEE
International Conference on Electronics, Circuits and Systems
– ICECS2013, Abu Dhabi, UEA, December 8 - 11, 2013.
Página
32
Contact: [email protected] / +55-51-33089500
A3.4 HIERARCHICAL AND3D NOCS FOR MPSOC
Débora MATOS, Pos-Doc at UFRGS
Tiago MOTTA, Graduate Student (UFRGS)
Prof. Dr Marcio KREUTZ (UFRN), researcher
Prof. Dr Cesar ZEFERINO (Univali), researcher
Prof. Dr Altamiro SUSIN (UFRGS), reseacher.
Prof. Dr Ricardo REIS (UFRGS), activity leader.
These systems should be very efficient in terms of power
and performance, and one of the great responsibilities to
obtain these results corresponds to the interconnection
device. In this context, the use of a conventional 2D
Networks-on-Chip (NoCs) becomes complicated with
the increase in the number of PEs in terms of
performance. This emerges the 3D integration, where
multiple silicon layers are stacked vertically; allowing
the development of one technology for each layer (e.g.
digital, analog, memory, RF) and offering a great
opportunity to diversify the functionality of electronic
devices [1-2]. However, 3D IC technologies also bring
new challenges. Stacking layers interconnected by a fullinterconnected 3D-NoC increases substantially the area
and power, due to the TSV (Through-Silicon Via)
pillars.
NoCs for 3D designs need to have extra channels to be
interconnected to the TSVs and therefore, some analyses
need to be considered in order to reach the mentioned
advantages. The proposal of this activity is to consider a
3D-hierarchical network-on-chip based on crossbarswitch clusters to explore the communication locality
and ensure the PEs rates required by the application.
II. ACTION AND PROPOSALS
A.
NoC Topology for MPSoCs
One solution to sustain MPSoC communication
performance is to consider a suitable interconnection
topology for the system. We have evidenced that a
homogeneous and general purpose topology, like a mesh
is not the ideal alternative to interconnect the embedded
system, since the application communication patterns are
irregular and strongly application-dependent.
Another consideration that evidences the need of a
heterogeneous topology is due the fact that current
MPSoCs present different communication patterns,
where only few interactions are need among them. Due
to this scenario, and also, considering the need to
improve the performance and allowing layers for specific
technologies, the proposed topology is a hierarchical 3D
NoC, as presented in Figure 1. It is composed of a 7x7
router and a configurable crossbar switch.
B. 3D Integrated Circuits
The hierarchical proposal presented in Figure 1 is called
3D-HiCIT and matches well with the context of 3D ICs
since this solution allows a substantial reduction in the
number of 3D routers and consequently, in the number of
TSVs. As TSVs are expensive and are prone to defects,
this reduction presents some benefits in area, in power
consumption and in the manufacturing process. Figure 2
illustrates a comparison between 3D mesh and 3DHiCIT topologies, presenting the large reduction in the
TSV pillars with our solution.
(a)
(b)
Figure 2. (a) 3D mesh and (b) the HiCIT topology.
III. RESULTS
Synthesis results for 65nm of process technology were
verified for a conventional mesh topology and the
proposed hierarchical solution. The results in Figure 3
present the power reduction in the use of the 3D-HiCIT
as the number of cores in the system increases. These
results are possible thanks the integration of the crossbar
in the mesh topology in a hierarchical manner.
33
The industry has manufactured integrated circuits (ICs)
composed of billions of transistors on a single die thanks
to the fast development of new process technologies.
With this evolution, the number of circuits on a chip, like
processors, memories, specific processing elements
(PEs) and other devices has also increased, bringing an
exponential growth in the complexity of their
interactions [1]. The proposed solutions for this activity
are the development of a methodology and an optimal
architecture for MPSoCs (Multi-Processors System-onChip), considering their interconnections. Many
strategies have been analyzed with regard to current
complex MPSoCs in order to find appropriate techniques
in the system interconnections.
Figure 1. The proposed hierarchical router architecture.
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I. INTRODUCTION
Figure 3. Power results for a 2D and 3D mesh topology
compared to the 3D HiCIT.
IV. PUBLICATIONS
[1] MATOS, Debora; REINBRECHT, Cezar, MOTTA, Tiago;
SUSIN, Altamiro, "A Power-Efficient Hierarchical Networkon-Chip Topology for Stacked 3D ICs ", VLSI-SoC 2013.
V. REFERENCES
T. Xu et al., “A Study of Through Silicon Via Impact to 3D
Network-on-Chip Design”, In ICEIE, pp. - V1-333 - V1-337,
2010.
Página
34
W. R. Davis et al., “Application Exploration for 3D Integrated
Circuits: TCAM, FIFO and FFT Case Studies”, pp. 496-506,
TVLSI,
2009.
A3.5 RELIABILITY AND TESTABILITY
Prof. Tiago R. Balen (UFRGS), activity leader
Profa. Fernanda G. L. Kastensmidt (UFRGS), researcher
Prof. Paolo Rech (UFRGS), researcher
Lucas A. Tambara, PHD student
Alisson J. C. Lanot, MsC Student
I. INTRODUCTION
The Reliability and Testability activities (A3.5) were focused
on the study of radiation effects on microelectronics systems
and development of mitigation techniques.
Both TID (Total Ionizing Dose) and SEE (Single Event
Effects) were considered as subject of study in different
analog, mixed-signal and digital circuits and systems. Both
irradiation experiments and simulations (at electrical or
logic levels) were performed to investigate the radiation
effects in such platforms and validate different mitigation
strategies.
II. ACTION AND RESULTS
The next subsections briefly present the actions and
results obtained in different tasks belonging to the A3.5
activity.
circuits sensitive to total ionizing dose effects. It consists in
replicate N modules of a critical system part and to alternate
the use of each replica over time by using a dedicated power
switching and multiplexing control. The alternated use of
each module increases the initial recombination of electronhole pairs generated by ionizing radiation incidence, due to
the absence of electrical fields in the insulation oxides when
the power of each module is off. This reduces the buildup
rate of oxide and interface trapped charges of CMOS
circuits subjected to TID Effects. In order to validate this
technique, a board level prototype was built, considering an
FPAA (Field Programmable Analog Array) as Device Under
Test (DUT). The prototype was exposed to Co60 gamma
radiation. Results show that devices that are alternated
biased are able to tolerate higher accumulated doses than the
one that is permanently biased. The alternated devices
presented an increase in the time-to-failure from 13.7%
(DUT75: biased 75% of the irradiation time) to 43.5%
(DUT25: biased 25% of the time). Figure 2 shows the
increasing on the supply current of each device during the
irradiation, as well as the time (dose) of failure of each
device.
A. Study of SET effects in a charge redistribution SAR-ADC
Single Event Transient effects on SAR A/D converters
based on charge redistribution were studied. The effects of
SETs were analyzed considering the worst-case pulses for
the 130nm CMOS technology, and were injected by means
of Spice Simulations. Preliminary results show that the
transient effects may change the state of one or more bits of
conversion. This is due the fact that the affected stage may
propagate an incorrect value to the remainder of the
conversion, leading to multiple bit errors on the converted
data, as depicted in Figure 1. Results show that in some
cases the effects may be mitigated by increasing the sizing
of the transistors. However, depending on the affected node,
additional fault tolerance techniques may be needed. These
fault tolerance alternatives are currently being investigated.
Failure
DUT100
Failure
DUT75
Failure
DUT25
of
of
of
DUT10
0
DUT75
DUT25
Figure 2. Supply current of the DUTs as function of accumulated
dose or time of experiment.
B. A new fault tolerance technique to cope with TID
effects
A novel system level fault tolerance technique based on Ntuple Modular Redundancy (NMR), associated to an
alternated biasing scheme, was proposed. The technique is
called ABMR (Alternated Biasing Modular Redundancy)
and is intended to extend the lifetime of CMOS electronic
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Figure 1. Conversion error due to an injected SET dusring the
charge redistribution phase.
From Dec. 13rd to Dec. 20th (2013) we performed radiation
experiments at ISIS, Rutherford Appleton Laboratories,
Didcot, UK. We irradiate four GPUs and 6 FPGAs with the
available neutron beam, which is suitable to emulate the
atmospheric flux. Both embedded GPUs (NVIDIA Quadro)
and HPC GPUs (NVIDIA K20) were tested, to evaluate the
radiation sensitivity of safety critical applications and
supercomputers codes. We have seen that duplication has a
great computational overhead, but provide the user a perfect
reliability. Additionally, Xilinx Virtex-5 FPGAs were used
in order to evaluate the robustness of several TMR schemes
with different levels of granularity in SRAM-based FPGAs.
Our goal was to establish a relation between TMR
granularity levels overhead and fault tolerance. Results have
shown that increasing the number of majority voters leads to
a reduced soft error rate and to achieve a higher fault
tolerance level.
35
C. Practical neutron radition experiments on digital
devices
III. MAIN PUBLICATIONS
[1] Rech, P, et, al., "Threads Distribution Effects on Graphics
Processing Units Neutron Sensitivity", IEEE TNS, Vol. 60, No. 6,
pp. 4220-4225, 2013.
[2] Tambara, L. et al., “Neutron-induced single event effects
analysis in a SAR-ADC architecture embedded in a mixed-signal
SoC. In: IEEE CS Ann. Symp. on VLSI (ISVLSI), 2013, Natal.
Obs.: In 2013 we have published 11 conference papers and 2
journal papers.
______________________________________________________
Página
36
Contact: [email protected] / phone: +55 51 3308 4473
A4 AREA SEMICONDUCTOR DEVICES
This area is coordinated by José Alexandre Diniz, from the
State University of Campinas.
Given the vertical structure of this Project, it is important
that the application section occurs at the same time as the
sensor development. Therefore while sensors are
developed, application utilizing of the shelf components is
expected. Nevertheless, it is important to aim the
interaction. As a marker goal for this vertical integration,
we have chosen the instrumented sphere, or artificial fruit,
which will employ sensors of this section. Besides the
vertical interaction, it is essential that we obtain a
horizontal integration among the researchers in the area of
sensors. The collaborations between research groups are
increasing and indicated in Figure 1, which presents the
collaborations at the beginning of this project (in Figure
1(a)) and up to march, 2014 (in Figure 1(b)).
1.Objectives
1.1- To create a platform with basic elements for the
development of high performance sensors;
1.2-To provide NAMITEC basic resources for innovation
in sensor networks;
1.3-To create new sensors allowing a leverage to Brazilian
technology;
1.4-To collaborate directly with industry towards the
development of sensors;
2. Summary
Based on the results, which will be presented in the next
items, it can be observed that the performance and the
integration have been respected as shown in the original
project. This is confirmed by results of this year, which are
presented in summary as follow:
60 articles were published in conference proceedings;
25 articles were published in indexed journals;
5 master degree dissertations and 3 PhD thesis were
concluded;
2 courses of microfabrication were ministered;
2 visits of integration and interchange between members
were incentivized;
For the fifth year of the project, these results, listed above,
are fulfilling the objectives set out in item 1, because the
publications number and the Master degree/PhD, which
were concluded, we are working with objectives 1.1, 1.2,
and 1.3. We are approaching with industry to develop
sensors (objective 1.4), because Brazilian companies, such
as Tritec, Propertec/Neuron and Flexsolar, are contributing
to implement our devices in the market, such as: hydrogen
and acetylene sensors, RF filters and alternative solar cells,
respectively. Furthermore, based on Figure 1(b), we are
consolidating one important research network with the
collaborations into the NAMITEC, which have developed
pH (ISFET), pressure, hydrogen and acetylene sensors, RF
filters and antennas, as you will able to see in the next
items of this report. It is important to notice that all these
devices can be implemented in industry (objective 1.4).
Contact: [email protected] +55(19)3521-5177.
Página
37
Figure 1 – Collaborations between research groups in Area
A4 of NAMITEC. In (a), collaborations at the beginning of
the project; and, in (b), collaborations up to march, 2014.
.A4.1.1
ISFET (ION SENSITIVE FIELD EFFECT TRANSISTOR)
Prof. Dr. José A. Diniz, activity leader/FEEC/CCS/Unicamp
Prof. Dr. Jacobus W. Swart, activity leader/FEEC/CCS/Unicamp
Angélica D. Barros, postdoctoral researcher/FEEC/CCS/Unicamp
Rodrigo Reigota César, master student/FEEC/CCS/Unicamp
Jair Fernandes de Souza, researcher/IFAM
In this case, each pH value adds a contribution to the flat
band voltage (VFB), resulting in a displacement of the
CxV curve. It was possible to determine from the VFB
versus pH curve the sensitivity of 41 mV/pH (Fig.3).
I. INTRODUCTION
An important device to determine ion concentration is the
one based on the field effect. Field effect devices, such as
ISFETs and EIS have been developed for Namitec, not only
for pH detecting, but also for Pb+ in water detection.
II. ACTION AND RESULTS
Ion sensitive field effect transistors (ISFETs) with titanium
oxide as gate dielectric have been developed as pH sensor.
In order to create a specific sensor for Pb+ detecting, the
gate dielectric can be modified with cerium phosphate. To
test this approach, an alternative structure was used, called
electrolyte-insulator-semiconductor (EIS) .
A. ISFET with titanium oxide (TiOx) as gate dielectric
These films were obtained after rapid thermal oxidation in
different temperatures of Ti thin films deposited by
sputtering. They were used as ISFET gate dielectric [1].
Figure 1 presents the threshold voltage versus pH of the test
solution. In this case, sensitivity of S=64 mV/pH was
estimated.
3 ,6
Fig.3 – VFB versus pH curve to estimate the sensitivity of the
EIS.
C. EIS with TiOx and cerium phosphate (CeP) as
dielectric
The EIS structure was also tested as Pb+ sensor. In order
to enhance the Pb+ detection an additional cerium
phosphate [2] layer was deposited over the TiOx thin
film. From the VFB versus Pb+ concentration curve the
sensitivity of 90 mV/100ppm (Fig.4) was obtained.
VT (V)
S e n sitivity: 6 4 m V /p H
3 ,4
3 ,2
4
5
6
7
8
9
10
pH
Fig.1 - VT versus pH curve to estimate the sensitivity of the
ISFET.
B. EIS with titanium oxide (TiOx) as dielectric
The device for pH measurements called EIS operates as a
Metal-Oxide-Semiconductor capacitor but the metal contact
is replaced by an electrolyte solution and a reference
electrode, which are used to apply voltage (Fig.2).
[Pb+] (ppm)
Fig.4 - VFB versus Pb+ concentration curve to estimate the
sensitivity of the EIS.
III. ACKNOWLEDGMENTS
The authors acknowledge Rafaela Nascimento and Prof.
Dr. Oswaldo L. Alves from the Institute of Chemistry,
State University of Campinas, for the valuable
collaboration.
IV. REFERENCES AND PUBLICATIONS
Contact: [email protected] / +55-19-3521-5177.
Página
Fig.2 - EIS structure.
[2] R. Nascimento-dissertação de mestrado, “Papel Mineral ( ipapel ) como substrato para a produção de nanocompósitos
funcionais organo-inorgânicos”, State University of Campinas,
2013.
38
[1] A. D. Barros-Tese de doutorado, “Desenvolvimento de
filmes finos de TiOx e ZnO para dispositivos ISFET e SAW”,
State University of Campinas, 2013.
A 4.1.2 – POLYMERIC NANOFIBERS
Membranes was made with nanofibers composites produced
by electrospinning using PAN as the polymer fiber and
starch or carbon black as particles A set of selective
membranes was inserted in miniaturized structures. Fiber
characterization showed particles inserted inside the fibers
and the ability for water adsorption on starch fibers or
VOCs on carbon black ones. Such membranes deposited
sequentially can act as a separation/removal steps for VOCs
mixtures.
II.
ACTION AND RESULTS
c
)
PAN fibers, with or without carbon black, electrospun over
PQC (Figure 2.a) can be considered not sensible to water
vapor, as Figure 2.b) points out; thus QCM measurements
show maximum variation of 1 Hz or 10 Hz on 100% relative
humidity for PAN and PAN+carbon black, respectively.
However, acetone can provide desorption on PAN+carbon
fibers (Figure 2.c).
20
8
PAN + Carbon Black - 100 ppm
PAN + Carbon Black 100%
PAN - 100 ppm
QCM analysis
Water vapor injection
4
acetone
15
saturated
10
0
5
F (Hz)
-4
-8
-12
a
-16
0
venting
-5
injection
-10
-15
0
20
40
60
80
100
120
140
)
injection
b
-20
)
-20
Time (s)
The following steps were carried out sequentially: a) fiber
development and characterization; b) miniaturized structures
development and simulation; c) fiber deposition on the
optimized miniaturized structure and tests. Fibers
composites are made of polyacrilonitrile (PAN) dissolved in
dimethylformamide (DMF) and starch (5µm, homemade) or
carbon black (up to 50 nm, Vulcan® XR70R) particles for
adsorption and VOCs detection. Fiber characterization was
performed by FTIRS, optical and SEM. Miniaturized
structure is a double cavity adapted to receive more than one
membrane, as can be seen in Figure 1, which also displays
the setup and a PAN+carbon black membrane. The
conception on such device is that the gas diffusion can be
hindrance on nanofiber membranes and the final fluid
emerging near detector surface shows a different
composition, which can facilitate mixture analysis.
Optical and SEM measurements (Figure 1d) indicated that
the starch and carbon black particles were incorporated. It
was observed the presence of agglomerates electrospun
)
Fig. 1: a) miniaturized
structure, electrospinning setup
with b) nanofibers in detail and
c) SEM images of PAN carbon
black nanofibers.
F (Hz)
Due to the large surface/volume ratio, nanofiber membranes
can be useful on sensors development, for instance, by
deposition in PQC (piezoelectric quartz crystal) and
measurement on QCM (quartz crystal microbalance) setup.
On such setup, the specificity on detection depends mainly
on the fibers chemical surface properties. Moreover, some
fibers were also developed for use in microstructures, such
as microreactors. Although the
production by
electrospinning is a low cost simple process, it is uncommon
the fiber manufacturing using such approach on diminutive
dimensions, among other issues, probably owing to the
charge effects on the edge of such structures. Nonetheless,
fiber electrospun on 3D-microchannels proved to be an easy
way for obtaining thin suspended membranes; thus, with the
correct choice of polymer and particle, such membranes had
turned into selective for several distinct reactants, such as
water [2]. Therefore, this work aimed the production of
selective membranes for two different purposes: a) as
sensing material on QCM measurements and b) on
miniaturized structures for sample pretreatment, for water
removal or VOCs separation.
b
a
)
-25
0
25
50
75 100 125 150 175 200 225 250
Time (s)
Fig. 2: a) injection of water vapor, b) injection of acetone vapor.
Thus, if a set of these membranes is used sequentially in a
cavity,(figure 1.a) the pervasion of organic carbon presents a
dynamic behavior. The use of one or even two carbon black
membranes do not prevent ethanol escaping from the cavity
but the obtained signal is not constant, with high and low
intensities along the time. If acetone is added to the system,
a high intensity, due to desorption is obtained, but the
dynamic behavior remains. The mechanism that explains the
obtained results can be understood as a sequential
adsorption/desorption on fibers surface followed by a
region, among membranes, that works as a microchamber.
On such area, a quasi-equilibrium condition can be achieved
and different reactants are desorbed on different velocities.
In summary, a mixture can be analyzed more easily.
39
I. INTRODUCTION
together with the fibers, indicating the interaction between
polymer and particles. The fibers diameters increase as the
carbon particles concentration increases. There is an
intricate interaction mechanism between particle/polymer
and the particle/particle into the dispersion. The increase of
relative viscosity in function of carbon particle concentration
also suggests that the particle/particle mechanism dominates
over particle/polymer interaction.
Página
José Alexandre Diniz (FEEC/CCS/UNICAMP): Coordinator
Jair Fernandes de Souza (IFAM): Researcher
Marcelo Eduardo H. Maia da Costa (PUC-Rio): Researcher
Sebastião Gomes dos Santos Filho (LSI/EPUSP):Researcher
Ana Neilde R. da Silva (LSI/EPUSP): Researcher
Iakov Kopelevich (IFGW/UNICAMP): Researcher
Antonio Pacheco Rotondaro (CTI): Researcher
Cecília de Carvalho C. e Silva (IQ/UNICAMP): PhD Student
III. MAIN PUBLICATIONS (TIMES 9)
[1] A. N. R. da Silva, M. L. P. da Silva, E. R. Fachini, Journal of
Physics:
Conference
Series
421(1)
012013
(2013)
doi:10.1088/1742-6596/421/1/012013
Página
40
Contact: [email protected]
A4.1.3 CHEMICAL SENSORS FOR DETECTION OF HYDROGEN AND
ACETYLENE
Sebastião G. dos Santos Filho (LSI-USP) activity leader
Mário R. G. Rubio (IPT) researcher
Ronaldo W. Reis (LSI-USP) researcher
Fernando Trevisan Saez Parra (LSI-USP) PhD student
Fernando Luís de Almeida (LSI-USP) PhD student
Lúcia Hiromi Higa Moreira (LSI-USP) PhD student
Raphael Garcia Moreira (LSI-USP) MSc student
I. INTRODUCTION
For environmental monitoring, nowadays exist an
increasing interest to detect hydrogen and hydrocarbons
that can be found in marine and atmospheric environments,
and in the process of oil production. Chemical sensors can
be used for gas detection of gas leaks in clean rooms, leak
detection in gas compressors, fail monitoring of highvoltage transformers and ripening process of fruits [1-5].
This report is focused on the activities performed during the
fifty year of INCT-Namitec concerning to the development of
chemioresistors for hydrogen detection and potentiostatic
cells with three electrodes for acetylene detection.
was covered by an aluminum capsule with a teflon
membrane closing the upper side.
For acetylene detection, a three-electrodes potentiostatic cell
was used. The working electrode (sensing) was
manufactured of porous gold on Nafion or Teflon electrodes
as shown in Fig. 3. The auxiliary (counter) and the reference
electrodes were defined on Al2O3 using platinum serigraphic
paste as shown in Fig.3. Sensing electrode was
manufactured with porous gold on micro-porous membrane
of Nafion or Teflon in order to enhance the acetylene
sensitivity. The basic chemical reaction for acetylene
absorption onto the porous Au is given by:
Au + C2H2 = (AuC2H)ad + H+ + e(1)
This reaction is followed by an anodic current across the
sensing electrode for a well-known standard oxidation
potential(1.2 V) and with detection limit higher than about 10
ppm. The steps of processing were: (a)deposition of porous
gold onto Nafion and Teflon, (b) definition of platinum on
alumina using Silk-Screen, (c) test of a commercial
electrolyte of H2SO4 gel and (d) development and test of
alumina micro-chambers. Fig.3 shows, respectively, details
II. EXPERIMENTAL AND RESULTS
Fig. 2 shows details
of the encapsulation,
which was developed for the hydrogen sensor. Over a basis
of alumina with metallic terminals, it was mounted the
of the serigraphed tracks on alumina, the cylindrical tube
glued on the electrodes and the Au/Teflon membrane glued
on the top of the tube. Fig.3 also shows the typical I-V curves
for 10000ppm acetylene flowing on a Au/ Teflon electrode
during, respectively, 30 and 60min.
III. CONCLUSION
. In conclusion, it was fabricated and characterized
chemioresistors using Pd(P) sensing layers operating at
temperatures ranging from 100oC to 155oC for the detection
of hydrogen in the range 10 to 10.000 ppm. Also, it was the
prototyped an electrochemical sensor for detecting acetylene
at 10000ppm range.
IV. REFERENCES
Figure 2 – Mounting the sensor in the encapsulation
sensor, a PT100 to monitor temperature and a heater
composed by a serigraphed resistor on alumina. The
terminals of the set formed by sensor, heater and PT100
were welded on the contacts of the basis of alumina, which
[1] Ma, G.-m. et al. Sensors and Actuators B, v. 169, p. 195, 2012.
[2] Jordan, L.R.; Hauser, P.C. Anal. Chem., v. 69, p.2669, 1997.
[3] Ishiji, T. J. of Appl. Electrochem., v. 23, p. 77, 1993.
[4] Polishchuk, V. et al, Anal. Chimica Acta, v. 375, p. 205, 1998.
[5] Hannigan, J. et al. Meas. Sici. Technol., v. 10, p. 93-99, 1999.
Contact: [email protected] / +55-11-30915314.
41
Fig.1 – Hydrogen sensor
Fig. 3 – Serigraphed tracks on alumina, I-V for 10000ppm
C2H2 (30 and 60min.), cylindrical tube glued on the electrodes
and Au/Teflon membrane glued on the top of the tube.
Página
Fig. 1 shows the hydrogen sensor composed of a sensitive
Pd(P) layer (300nm thick) deposited on an intrinsic layer of
polysilicon (500nm thick). The key steps of the fabrication
were: (a) characterization of the Pd(P) electroless
deposition, (b) characterization of low-resistance contacts
using carbon paste on Pd(P), (c) fabrication of hydrogen
sensors using Pd(P) alloys and (d) characterization of the
sensitivity to hydrogen obtained through the measurements
of resistance as a function of the hydrogen concentration
and of the concentration
and of the temperature
using gas chambers with
controlled injection of
hidrogen in the range of
10 to 10000 ppm.
A4.1.4 SOI FINFET (3D) TRANSISTOR AS A HYDROGEN SENSOR
João Antonio Martino (USP), coordenador
Sebastião Gomes dos Santos Filho (USP), pesquisador
Antonio Carlos Seabra (USP), pesquisador
Jose Alexandre Diniz (UNICAMP), pesquisador
Marcelo Antonio Pavanello (FEI), pesquisador
Mariana Pojar (USP), pesquisadora
Ricardo Rangel (USP), pesquisador
B.
3D transistor used for analog application.
The 3D transistors fabricated with the process flow above
were used for extraction of some analog figure of merit like,
transconductance, output conductance and intrinsic voltage
gain.
I. INTRODUCTION
The goal of this project is the design, fabrication and
electrical characterization of transistors building on silicon
on insulator SOI (Silicon-On-Insulator) wafer with multiple
gates and vertical channel, called FinFET or 3D transistor.
It will be analyzed in terms of the hydrogen sensing. The
implementations of the first 3D transistors were done by
electron beam (e-beam) lithography at USP and using FIB
at UNICAMP. This report shows the experimental
characterization of 3D transistor obtained by e-beam for
analog application.
II. FABRICATION OF 3D TRANSISTOR (FINFET)
A. 3D transistor using only three lithography.
Fig.2- FinFET (3D) photo – USP
Figure 3 shows the experimental output characteristics
(IDS x VDS) and figure 4 shows the intrinsic voltage
gain (AV) for different transistor channel width (WFIN).
The gain reaches up to 20 dB, which is considered good
for this kind of device.
9.0
7.5
WFIN=210nm toxf=4.5nm
HFIN=100nm toxb=200nm
VGB=0V
LG=2.5m
Fig.1- FinFET (3D) schematic structure
IDS(A)
6.0
VGF = -0.50V
VGF = -0.25V
VGF = 0.00V
VGF = 0.25V
VGF = 0.50V
VGF = 0.75V
VGF = 1.00V
4.5
3.0
1.5
Starting with a SOI wafer, the simplified process flow is
shown below.
1.
First e-beam lithography:
definition (WFIN);
2.
Gate oxidation (4.5nm of SiO2);
3.
Poly-Si deposition by LPCVD and doping.
4.
Second e-beam lithography: Gate Definition (LG)
5.
Ion Implantation of Arsenic (Source/Drain);
6.
Annealing.
7.
Aluminum deposition;
8.
Third e-beam lithography: Metal definition;
9.
Sintering;
0.0
0.0
0.2
0.4
Active (silicon) area
0.6
0.8
VDS(V)
1.0
1.2
Fig.3- Experimental output characteristics of 3D Transistor
20
10
5
200
400
600
800
1000
1200
W(nm)
Fig.4- Intrinsic voltage gain for different WFIN
42
0
Página
The schematic structure and the photo of the 3D
transistor can be seem in figures 1 and 2 respectively.
Av (dB)
15
III. REFERENCES
[1] RANGEL, R., POJAR, M., SEABRA, A. C., Santos Filho,
S. G, MARTINO, J. A.; Fully Electron-Beam-Lithography SOI
FinFET; In: 28th Symposium on Microelectronics Technology
and Devices - SBMicro 2013, 2013, Curitiba, Proceedings of
SBMicro 2013. IEEE, 2013. v.online. p.1 - 4
Página
43
Contact: João Antonio Martino, University of São Paulo
[email protected], +55-11-3091-5657.
A4.1.5 ORGANIC SENSORS BASED ON POLYMER
Profa, Dra. Artemis Marti Ceschin (ENE/UnB), activity leader
Prof. Dr. Stefan Michael Blawid (ENE/UnB), researcher
Profa. Dra. Maria José Araujo Sales IQ/UnB), collaborator
Profa. Dra. Nizamara Simenremis Pereira (IFB), collaborator
Five undergraduate students
I. INTRODUCTION
Electrical Characterization of PEDOT/PSS circuit paths
printed with an office laser printer
Organic electronics is of high interest since it may substitute
in future conventional silicon based electronics in selected
low-cost applications. We report here on a simple and
inexpensive patterning technique to print organic circuit
paths with a conventional office laser printer. The technique
has been first demonstrated for graphite [E.C. Venancio et
al., Sensors and Actuator B, 130, 723-729 (2008)] and we
adopted the process to successfully pattern PEDOT/PSS
circuit paths with reasonably high reproducibility.
CleviosTM PEDOT/PSS is a substituted polythiopene
ionomer complex with a polyanion claimed to offer the
highest conductivity found so far in a commercial product
[Datasheet Nr. 81075818, Issue: 2010-12-17], although we
employ here only the aqueous standard dispersion
(CleviosTM P). The printing of PEDOT/PSS circuit paths
will be part of a process technology for organic electronics
currently developed at the Laboratory for Devices and
Integrated Circuits (LDCI)- UnB. In the present project the
design rules for the printed circuit paths shall be determined,
i.e. the sheet resistance and the contact resistivity, which
allow to determine the geometric dimensions (length and
width) of circuit paths and contacts required to implement
chosen resistance values. Since two- point resistance
measurements cannot distinguish the contributions of
contacts and circuit line, we employ the well-known
transmission line method. We report also on the resistance
of silver contacts.
II. ACTION AND RESULTS
Electrical and morphological characterization of humin
films on glass and polyester substrates
Electrical measurements were performed at room
temperature using a Keithley 2400 programmable
semiconductor measuring system. A stainless steel test tip of
the Keithley equipment was placed directly on the humin
film separated by a distance of more or less 1 cm. No special
electrode was used to make contact. Tapping mode atomic
force microscopy (AFM) was performed employing a
scanning probe microscope (Veeco Innova Instruments).
Topography (height) was recorded in room ambient
conditions. Commercial antimony (n) doped silicon
cantilever probes with spring constant in the range of 1-5
N/m were oscillated at their fundamental resonance
frequencies, which ranged from 60 to 100 kHz.
In figures 1 the I-V curves,are shown (revealing
NDR behavior), for the humin film on the glass substrate
and on the polyester substrate, respectively. Measurements
were performed in different positions of the relatively large
area. Peak current values do vary, but the NDR effect is
consistently found in all measurements. We noticed that
after applying a positive voltage ramp to the sample, the
NDR effect could no longer be observed in following
measurements, which revealed instead a regular diode curve.
The initial behavior including a NDR region reappeared
after applying a negative voltage ramp. This effect was
observed for both sample types (polyester and glass
substrate).
Samples showed surface topologies characterizaded
(AFM-Figure 2) by diferent values of Ra and Rms, as shown
Table 1. The diferent values of Ra and Rms could be justified
by the presence of peat structures that stayed on the glass
surface.
Table 1 – Ra and Rms of the samples on glass
substrate
Samples
G1
G2
G3
Ra (nm)
5,8
18,5
13,8
Rms (nm)
8,8
23,9
19,4
44
This work was developed by four undergraduate students,
which received a fellowship from CAPES (Young talents for
science) and which were enrolled in the second semester of
the Electrical Engineering Course as they begun the present
project. The initial goal of this work was to familiarize the
students to different materials (alternative ones), preparation
techniques and characterization methods. The work involved
the use of peat, a material of low cost that has been
exploited as a material for the application in ammonia and
humidity sensors [1,2]. The used material consists of humic
acid, fulvic acid and carbonyls. The main goal of this work
was to investigate the electrical and morphological
properties of humin films. The humin is formed from carbon
atoms and fractions of materials such as quartz; it has an
amorphous structure, black color and low solubility in water.
Figure 1 – Electrical measurements of the materials on glass
and flexible substrate.
Página
Electrical and morphological characterization of humin
films on glass and polyester substrates
The transfer length LT (and therefore ρc) can be obtained by
extrapolating the Rtot(L) even further to negative length until
Rtot = 0.
Altogether three generations of circuit paths were
manufactured. The first generation consisted of 14 crossed
tracks of various shapes. At least 6 different points along the
circuit paths were chosen to place the probe tips for resistance measurements. The second generation was
composed of 63 linear paths of the same width as the first
generation. Finally, the third generation was made from the
second generation with the placement of silver contacts in
some strategic points.
The extracted circuit path parameters are summarized in the
following table 2.
Table 2 – Circuit path parameters
Figure 2 - AFM images (height) of samples deposited on
glass substrate in 2D: (a); (b); (c); and in 3D: (d); (e) and
(f). Scanning area 5μm x 5mμ.

Genera
tion
To characterize the circuit paths, resistance measurements
were made employing a simple multimeter. Measuring the
accumulated resistance between two points of the circuit
path, it is expected that the resistance satisfies the expression:
R= ρ(L/A)=( ρ/h)(L/e)=Rsh(L/e)
(1)
Here ρ denotes the resistivity of the material.
The term Nsqr = L/e = A/e2 may be interpreted as the number
of squares that contributes to the resistance measured over
the distance L and, therefore, Rsh denotes the resistance of a
square. However, direct measurements of the resistance
between two points of the circuit path will be altered by the
resistance Rc of the two contacts between probe tip and
circuit:
Rtot = 2Rc + Rsh (L/e)
(2)
Applying a common technique to separate the two
contributions (transfer line method), we measured Rtot as
function of the distance L. The slope of the corresponding
graph determines the resistance per square and the extrapolated value for L → 0 gives Rc. For long contacts the contact
resistance does not scale with contact area but is dominated
1/2
by the front part of effective length LT = (ρc/Rsh) yielding:
Rc = (ρc/eLT) = Rsh(LT/e)
(3)
2
3
0,012M/
sqr
0,012M/
sqr
0,009M/
sqr
0,076
M
0,002
M
0,085
M
LT
0,6
cm
0,0
cm
0,9
cm
(kc

m
2,8
0
7,29
The third generation was manufactured and measured with
silver contacts. Interestingly, the contact resistance did not
improve. It proved quite difficult to work with silver contacts
because they stood out of the tracks (see Figure) and slight
tilts damaged the circuit paths. We also characterized the
linear circuit paths of the third generation employing fourpoint measurements (HP 34401A mulimeter). The
measurements confirmed the value Rsh = 0.012 MΩ/sqr,
however the impact of the probe tips and contacts could not
yet be eliminated.
III. PUBLICATIONS
[1]
A.N.Ribeiro;
characterization
G.B.Magela;
S.Blawid,
"Electrical
of PEDOT/PSS circuit paths printed with an office laser printer".
In: XII Brazil MRS meeting, 2013, Campos do Jordão. Livro de
resumos do XII Encontro da SBPMat, (2013).
[2] J.V.Gregorio, H.E.Orefice,L.T.H.S.Ma, R.F.R.Vasconcelos,
N.S.Pereira, K.S.Almeida and A.M.Ceschin, “Electrical and
morphological characterization of humin films on glass and
polyester substrates”. In: XII Brazil MRS meeting, 2013, Campos
do Jordão. Livro de resumos do XII Encontro da SBPMat, (2013).
IV. REFERENCES
[1] N.C.Ribeiro ; N.S. Pereira ; H.H.Guimarães ; G.L.Sandri ;
A.M.Ceschin, “Peat as an alternative material for use in ammonia
sensors”. In: 14 th International Meeting on Chemical Sensors,
2012, Nuremberg. 14 th International Meeting on Chemical
Sensors, v. 1. p. 1148 (2012).
[2] G.L.Sandri, N.C.Ribeiro, A.R.S.Romariz, A.M.Ceschin,
“Electrical and humidity characterization of humic substances(HS)
from peat for a possible use in humidity sensing”. ECS
Transactions 31, 419 (2010).
Contact: [email protected]
45
A simple technique to manufacture polymer circuit paths is
to draw and print a negative image of the desired pattern on a
(flexible) polyester substrate with an ordinary office laser
printer (see Figure). The polymer is then deposited on top
(application with a dropper) of the printed image. For
fixation the pattern is dried in an oven at 150 degrees for
three minutes. The application of PEDOT/PSS has to be
repeated once. Finally the ink is resolved and a positive
polymer image resides on the substrate. In the present project
we manufactured linear circuit paths with a width e of 0.1 cm
and 0.2 cm and various lengths L.
1
Rc
Página
Electrical Characterization of PEDOT/PSS circuit paths
printed with an office laser printer
Rsh
ρ
c
A4.2.1 PHOTOMETRY AND IMAGING IN THE THZ SPECTRAL RANGE
Pierre Kaufmann (UP Mackenzie and Unicamp), activity
leader, and 17 associates
I. INTRODUCTION
The SOLAR-T experiment was finalized in the year of
2013. It was integrated to data acquisition and telemetry
modules and tested. It carries photometers at 3 and 7
THz for solar flare observations on board of
stratospheric balloon missions. It was started the
construction of a new ground-based multi-THz frequency
telescope using Golay cell detector and metal mesh
band-pass filters. A new 30 THz solar telescope was
constructed, to operated in Brazil
The SOLAR-T experiment has been fully integrated to
the data acquisition and telemetry modules. Final tests
were done, including active telemetry data transmission
and reception. The modes of operation and sensitivity
proved consistent with the designed requirements.
SOLAR-T is ready to be flown in the first stratospheric
balloon mission opportunity. Two long duration fligh
opportunities have been offered, one over Russia (one
week) in cooperation with the Lebedev Physical
Institute, Moscow, Russia. Another mission will be over
Antarctica (two weeks), in cooperation with University
of California, Berkeley, USA. The missions are expected
for 2014-2016. One engineering flight (one day) is
planned to be carried the USA, in September 2014 or
2015.
preceded by a specially built chopper wheel containing
two to four band-pass filters (made by resonant metal
mesh, fabricated at CCS/Unicamp) centered at the
frequencies of 0.22; 0.4; 0.67; 0.87 and 1.4 THz. The
integration of the front-end, data acquisition, coupling to
a robotic positioner, and operational tests are being
performed by the company Propertech Ltda. Jacareí, SP.
The system is expected to be completed in the second
semester of 2014.
A 30 THz telescope system has been constructed at
Bernard Lyot” Solar Observatory, Campinas, and
installed at a high building of Mackenzie Prebyterian
University. It utilizes the existing solar coelostat, a
Wuhan ULIS microbolometer array. It will carry regular
observations at cadence of 5 frames/second together with
one H telescope in the visible.
Figure 2 – The new 30 THz solar telescope.
II. PRINCIPAL PUBLICATIONS IN 2013
[1] – Kaufmann, P.; White, S.M.; Freeland, S.L.; Marcon, R.;
Fernandes, L.O.T.; Kudaka, A.S.; De Souza, V.S.; Aballay,
J.L.; Fernandez, G.; Godoy, R.; Marun, A.; Valio, A.; Raulin,
J.-P.; Giménez de Castro, C.G..”A bright impulsive solar burst
detected at 30 THz”, Astrophysics Journal, 768, 134(9pp),
2013. DOI: 10.1088/0004-637X/768/2/134.
[2] – Kropotov, G.; Kaufmann, P. “Thz Photometer for solar
flare observations from space” . Photonika, 41, 40-51, 2013.
reflector is being roughened to difuse part of the
incoming visible and near IR radiation, delivering a
“cool” radiation beam to the detecting system. The
primary focus will receive one innovative multiple
frequency “front-end” consisting in a Golay cell
Contact: [email protected]
46
A new 46 cm diameter telescope, with short focal length,
is being constructed at “Bernard Lyot” Solar
Observatory, Campinas. It utilizes the same original
optical concept used in SOLAR-T. It is intended to
observe solar flares from the ground at few THz
“windows” at a very high altitude site. The
[3] – Kaufmann, P.; Fernandes, L.O.T.; Kudaka, A.S.; Marcon,
R.; Bortolucci, E.C.; Machado, N.; Abrantes, A.; Nicolaev, V.;
Timofeevsky, A.; Marun, A.. “The performance of THz
Photometers for solar flare observations from space”. In:
IMOC 2013 – International Microwave Optoelectronics
Conference, Rio de Janeiro, August, 4-7, 2013. IEEEXplore
978-1-4799-1397, 2013.
Página
Figure 1 – The ground-based multiple THz telescope design
being constructed.
A4.2.2 POSITION SENSITIVE PHOTO DETECTOR
MULTIPLE POSITION SENSITIVE PHOTODETECTOR
FOR OPTICAL DIFFERENTIAL DETECTION
0
10
10
2
10
1
10
0
10
-1
10
-2
+1mm
+4mm
+8mm
a)
10
-1
-1
0
10
Instituto de Física, UFRGS, Porto Alegre, RS 91501-970, Brazil
A Position Sensitive Detector (PSD) array formed by 64
one-dimensional PSDs is presented and characterized.
Shallow and low-doped p-n junctions are formed by boron
implantation in n-type silicon substrate to fabricate the PSD
structure. The Lateral Photo-Voltage (LPV) of the device
has shown a linear position characteristic within its whole
length of about 2 cm when irradiated by a He-Ne laser beam
with a power of 1.74 µW. The dependence of the LPV on
the incident optical power was studied and saturation effects
were observed for values above 10 µW. Dual beam
experiments were performed to study the concept of using
single PSD as dual optical signal subtraction detector.
3
b)
Voltage (mV)
Sensitivity (mV/mm)
Prof. Dr. Henri Boudinov (UFRGS), activity leader
Eliasibe Luis de Souza (UFRGS), PhD student
Prof. Dr. Ricardo Rego Correia (UFRGS), researcher
ABSTRACT
10
1
10
10
1
10
2
10
10
-3
10
-2
Power (W)
10
-1
10
0
10
1
10
2
10
3
10
4
Power (W)
Figure. 1. Dependence of the sensitivity on the beam power. (b)
Dependence of LPV on the beam power referred to three different
points on the PSD where the beam was positioned.
dependence for potential difference measured between
contacts of the PSD as a function of the power when the
light was focused at 1,0 mm, 4,0 mm and 8,0 mm from the
centre of the device. One can see clearly that the signal is
higher when the laser is positioned far from the centre of the
PSD, independently on the laser power. Independent of the
distance, the voltage is saturated at about 10 µW due to the
higher recombination rate of the excess carriers for higher
generation rates.
I. INTRODUCTION
Voltage (mV)
30
10
0
-10
-20
-30
-40
20
10
0
-10
-20
-30
a)
-40
2
4
6
8 10 12 14 16 18 20 22 24 26
Position (mm)
b)
2
4
6
8 10 12 14 16 18 20 22 24 26
Position (mm)
Figure. 2. Position characteristics for two beams configuration.
The power of each beam is of 660 nW. The distance between the
beam centres is (a) 1.94 mm and (b) 10.92 mm symmetrically
positioned in respect to the centre. The curves with triangle and
circle symbols refer to scans done by single beam. They have the
same sensitivity of 3.20 mV/mm. The curves with square symbol
refer to the scan done by simultaneously incidence of two beams
with sensitivity of (a) 4.91 mV/mm and (b) 5.68 mV/mm.
Using a beam splitter, the original beam was divided in two
with equivalent powers, i.e. 660 nW. Fig. 2 shows the
position characteristics for each beam measured separately
(triangular and circular point shapes) and for both beams
irradiating the PSD simultaneously (squared point shape).
The distances between the beams were of 1.94 mm at Fig.
4(a) and of 10.92 mm at Fig. 4(b). Due to the fact that both
beams had the same power, the single beam position
characteristics were identical, showing the same sensitivity
(same inclination of the curve).
III. MAIN PUBLICATIONS
DE SOUZA E.L., BOUDINOV H. AND CORREIA R.R.B.,
SENSORS AND ACTUATORS A, 195 (2013) 56.
47
The sensitivity in the central area of a single PSD for
different laser beam powers is shown in Fig. 1(a). Saturation
is completely established at a power of 10 µW. Fig. 1(b)
shows similar
20
Double Beam, 5.68 mV/mm
Beam1, 3.20 mV/mm
Beam2, 3.20 mV/mm
40
Double beam, 4.91 mV/mm
Beam1, 3.20 mV/mm
Beam2, 3.20 mV/mm
30
Contact: H. Boudinov [email protected], (51)33086547
Página
II. RESULTS
40
Voltage (mV)
The device proposed here is a multiple PSD for a novel
application. This device is basically an array of 64 onedimensional implanted p-type resistors built-up in n-type
silicon substrate with metallic contacts on both ends of each
1D-PSD to pick up the LPV signal formed in the resistive
layer. The main usage of the constructed device is for
multichannel optical heterodyne detection of the power
difference between two optical signals, when spectrally
dispersed reference and signal beams illuminates the PSD
array across the 64 lines. The PSD device provides a
differential detection scheme based on optical heterodyning,
very useful for all kinds of optical techniques, concerning
the discrimination of signal even on very low light levels.
The actual performance of a dual detector for optical
heterodyning is limited by the electronic signal subtraction
subsequent to optical detection. Even if the devices are
electronically identical, white quantum shot noise, optical
and electronic delays, as well as individual phase
fluctuations, degrade the phase correlation between the
currents of the detectors, which lead to an un-balanceable
fine adjustment. In this way, employing a single solid state
detector scheme for differential detection would be suitable
for cancelling most of these inappropriate electronic noise
additions, since the balanced detection would cancel noise
originated along the same junction that fluctuates uniformly
for electronic signals generated by each optical beam.The
PSD array is formed by 64 single p-n junctions with a length
of 20 mm and a width of 150 μm. The distance between
neighbor p-type resistors is 50 μm. Aluminum contacts have
been deposited at both longitudinal ends of each PSD.
A4.3.1 DEVELOPMENT, FABRICATION AND CHARACTERIZATION OF
MICROELECTROMECHANICAL SENSORS
Prof. Dr. Fabiano Fruett (UNICAMP), activity leader
Guilherme Coraucci (UNICAMP), PhD student
Juvenil Severino da Costa Junior, PhD student
I. INTRODUCTION
This activity contemplates the work about two
microelectromechanical sensors distinct. The first is a
multiterminal pressure sensor microfabricated in silicon and
the second a sensor system of air-relative humidity
fabricated through microstructures metalized in alumina.
II. FEM STUDY OF THE LIKE-HALL CURRENT DEFLECTION
EFFECT ON A PIEZORESISTIVE PRESSURE SENSOR
This work presents a study of the like-Hall-current-mode
behavior in the mechanical domain. For that, a piezoresistive
pressure sensor of multiple terminals was put under tests
using the Finite Element Analysis technique. This device is
called Multi-Stage Current-Mode Piezoresistive Pressure
Sensor, which is based on a 3-Terminal Pressure Sensor. The
piezoresistive effect shows up differently on a device
depending on whether the device is considered a long device
or a short device. On long devices, those where its length is
way larger than its width, the piezoresistive effect shows up
as a transverse voltage. In short devices, the effect shows up
as a transverse current component. To study the effect of
current deflection, our device is based on the Split-drain
devices that make use of the proprieties of dual Hall devices
that, in turn, makes use of the Hall current effect operating in
the current mode. Our results show that when an external
pressure is applied to the device, a redistribution of the
current takes place in the output terminals due to the
piezoresistive effect. In addition, a differential voltage drop
is seen in the terminals. However, the differential voltage
becomes constant as L/W is increasing. Hence, the current
deflection effect is decreasing, and transverse voltage seems
to prevail.
III.
STUDY OF ELECTRICAL PROPERTIES IN CARBON
NANOTUBE DEPOSITED ON ELECTRODES FABRICATED
ON SILICON SUBSTRATE
Carbon is one of the most abundant and fascinating element
on earth. It appears in several different forms or allotropes
with widely different properties. Among these allotropes are
diamond, graphite and amorphous carbon. It forms also a
great variety of novel structures that are being discovered
day after day these last years. The discovery of novel carbon
allotropes or carbon nanostructures (CNSs) has attracted
intensive attention due to their fundamental and
technological interests. They exhibit unique structural and
physical properties. Carbon nanostructures are promising to
revolutionize several fields of fundamental science and
contribute as major component of nanotechnology. Previous
studies have shown that these nanostructures can be used in
composite materials or in individual functional elements of
nanodevices such as: hydrogen storage, nanomanipulation,
medical usages and nonporous membranes. To analyze and
understand the behavior of any interconnect (CNT or else) it
is essential to first develop its equivalent circuit. The
development of an equivalent circuit is complete only when
various impedance parameters like resistance, capacitance
and inductance are fully defined by means of their analytical
expressions. However, it is very important to have a stable
environment to find these parameters.
In this work we used solution containing nanoparticles of
carbon nanotube. The solution was place by Nonuniform
Electric Fields process. Nonuniform electric fields is means
of selectively controlling particle motion, separations, and
assembly. The latter is of particular interest for
deterministically positioning particles synthesized from new
materials such as carbon nanotubes (CNTs), semiconductor
nanowires, conducting polymers, graphene, or biomolecules.
Figure 1 shows a diagram of Nonuniform Electric Fieldsprocess. são completamente definidas em expressões
analíticas.
Figure 1 and 2 show electrodes microfabricated and close in
this electrode.
Fig. 1: Electrical schematic of the 3-terminal device. This setup
is expanded to fit our multi-stage device
a
b
c
Fig. 2: Influence of L/W for the current variation in the multistage device without the Piezoresistive Effect
Página
48
Fig 3: Electrode microfabricated
IV. MAIN PUBLICATIONS
[1] CORAUCCI, G.O.; FRUETT, F., Silicon Multi-Stage CurrentMode Piezoresistive Pressure Sensor with Analog Temperature
Compensation. In: IEEE Sensors 2011 Conference, Limerick Ireland, v. x. p. xxxx, 2011, to be published
[2] CORAUCCI, G.O.; FRUETT, F., Silicon Multi-Stage CurrentMode Piezoresistive Pressure Sensor. In: IEEE Sensors 2010
Conference, Hawaii, v. 1. p. 1770-1774, 2010
Fig 3: Carbon Nanotube deposited
Tables I and II show the depositions parameters.
Table I. Carbon Nanotube parameter of deposition.
voltage(V)
1.5 - 5
frequency(Hz)
100kHz
time(s)
60
120
–
[3] A.V. Alaferdov, A. Gholamipour-Shirazi, M.A. Canesqui,
Yu.A. Danilov, S.A. Moshkalev . Size-controlled synthesis of
graphite nanoflakes and multi-layer graphene by liquid phase
exfoliation of natural graphite. Elsevier 2013 2012, Brasilia-DF., p.
525-535.
[4] Dresselhaus, M. S., Dresselhaus, G., & Eklund, P. C. (1996).
Science of Fullerene and Carbon Nanotubes, Academic Press.
[5] Ebbesen, T. W. (1997). Carbon Nanotubes: Preparation and
Properties, Chemical Rupper Corp, Boca Raton, FL.
Contact: e-mail: [email protected]
tel. +55 19 35213736
Table II. Graphene parameter of deposition.
voltage(V)
1.5 - 3
frequency(Hz)
40kHz
time(s)
30
90
–
We used the shielded room and to measurement a hp 3458A
millimeter equipment with 4-wire technique.
The figure 5 shows a shielded room.
Fig.5. Shielded room
Table I shows a preliminary measure of contact resistance.
Table I. Contact resistance measures
49
Resistance(Ω)
151,4
1490,7
1234,3
Página
Structure identification
a
b
c
A4.3.2 DEVELOPMENT OF PHOTOACOUSTIC SPECTROMETER WITH
SILICON PRESSURE CHIP WITH APPLICATION IN NANOPARTICLES
AND ENERGY
Dr. Milton Roque Bugs (CTI), activity leader
Dra. Raquel Kely Bortoleto Bugs (CTI), researcher
Dr. Jacobus Willibrordus Swart (CTI), researcher
Ms. Aristides Pavani Filho (CTI), researcher
Adriano Costa Pinto (CTI), tehcnician
Maria das graças de Almeida (CTI), technician
I.
C. The photoacoustics system
INTRODUCTION
The development of metallic nanoparticles (NPs) of
copper and silver is rapidly growing with the interest of the
industry and can provide solutions to technological and
environmental challenges in the areas of solar energy,
catalysis, medicine and metallic inks with applications in
flexible electronics and microelectronics.
The fundamental problem of NPs is associated with lack
of stability in the dispersion and the generation of
aggregates leading to loss of properties attributed to the
nanoscale. Additives are used to shape the surface with
positive or negative charges, or even hydrophilic or
hydrophobic.
Figure 2. The picture shows the photoacoustic acquisition data
screen of the sample of NP Ag 1.
The traditional analysis techniques do not allow
advances in molecular interaction processes of metallic NPs
making it difficult to develop new materials rationally. The
samples, usually of great interest in these areas are solid or
highly concentrated solution making it more difficult.
II.
ACTION AND RESULTS
We use the photoacoustic system (PAS) developed at
CTI for research and innovation in metallic ink, electronic
and Solar Energy. The sintering of metallic ink can be done
with intense pulsed light (IPL). The project develops the
reduction of metal ion in liquid medium, syntheses
processes for large volumes with low-cost in ambient
temperature.
Figure 3. The PAS signal of the samples NPs Ag 1 and Ag 2,
formed in two different matrices.
D. Photonic sintering of np
A. Materials and methods
The process in obtain NPs have conducted in open
ambient and with nontoxic substance. Electron Microscope
images were obtained at the LME of the LNLS, CampinasSP. The photonic sintering (IPL) of nanoparticles dispersed
in inks on low-temperature substrates for printed electronics
was done with the Sinteron 2000 of XENON.
B. The silver nps self-assembly
Figure 4. The picture shows the silver ink formed with the NPs
before and after the sintering process on the flexible substrate.
Figure 1. Absorbance of the self-assembly formation NPs Ag 1 and
Ag 2 and the respective infrared spectrum of Ag 1.
Página
50
Contact: [email protected], [email protected],
+55 19 3746 6202.
A4.3.3 SAW SENSORS BASED ON CARBON NANOTUBES
Dr. Serguei Balachov (CTI), activity leader
Dra. Olga Balachova (CTI), researcher
Dr. Stanislav Moshkalev (CCS-Unicamp) researcher
Aristides Pavani Filho (CTI), researcher
Maria das Graças de Almeida (CTI), technitian
Exponent factor [1/sec]
INTRODUCTION
Another important question is the question of stability of
measurements. It is necessary to optimize the process of the
film deposition to have the maximum possible response with
high stability.
II.
A  a1[1  exp(  k1t )]  a2 [1  exp(  k 2t )]
(1)
where A – is the sensor response, a1, a2 are the saturation
amplitudes of adsorption processes and k1, k2 are the kinetic
rates of them. All parameters of (1) were estimated using
the LSQ-fitting procedure. The typical result of fitting is
shown in the fig. 1.
E x t ra c t e d r e s p o n s e o f t h e s e n s o r
12000
10000
Frequency [Hz ]
8000
6000
4000
2000
0
0
100
200
300
400
500
600
700
Tim e [S e c ]
Figure 1 – Typical experimental adsorption
curve(blue) and result of its fitting by (1) (red).
The discrepancy between the experimental and the fitting
curves in all points was less then 0.1% for all cases, which
confirms the validity of the model (1). Experimental results
for the set of 7 humidity standards were treated by the (1).
The parameters obtained are shown in fig.2 and fig. 3.
Saturation amplitude
4500 0
4000 0
3500 0
Frequency [Hz]
34 droplets
0,2
Quartz
0
0,2
5 droplets
3000 0
0,4
0,6
0,8
1
1,2
Relative humidity
Figure 2 – Kinetic rate coefficient (exponent factor ) k1
for the set of humidity standards.
The second exponent parameters from (1) happened to
correspond to the process with the saturation amplitude is
approximately 5 times smaller and kinetic rates is
approximately 40 times smaller than the first one. Based on
the analysis of these data it was concluded that:
1.
The adsorption curve contains contribution of
two processes. The first one is the fast process,
which corresponds to adsorption of the water
molecules by the plane flakes of the GO and the
second one is the slow diffusion of the water
molecules into the bulk structure of the GO
2.
The product under study structure is
characterized by the first exponent parameters
whereas the second exponent characterizes the
GO inner structure
3.
Pretreatment of the surface of the piezoelectric
crystal with oxygen plasma improves the
uniformity of the film and increases the value of
saturation amplitude
4.
The sensor was tested for cyclic response. No
hysteresis of the response was detected. The
accuracy of measurement was estimated to be
more than 0.5%.
III.
14000
-2 0 0 0
11 droplets
0,4
0
ACTION AND RESULTS
The process of the water desorption from the surface
of the product under test was approximated by the two
separate processes each of which can be described by the
first order diffusion process. The kinetic curve for such a
process is
5 droplets
0,6
MAIN PUBLICATIONS
[1] BRAGA, A. V. U. ; Balashov S.M. ; O.V. Balachova ; A.
Pavani Filho ; Palácios-Cabrera, H.A. . Characterization of a water
activity SAW sensor with nanostructured sensitive film deposited
by the SAW atomizer. In: IBERCHIP XIX Workshop, 2013,
Cusco, Peru. IBERCHIP XIX Workshop Proceedings, em CD,
2013.
[2] S.M. Balashov ; O.V. Balachova ; BRAGA, A. V. U. ;
BAZETTO, M. C. Q. ; A. Pavani Filho ; S. Moshkalev . Kinetic
characteristics of the SAW humidity sensor partially coated with
graphene oxide thin film. In: 2013 Symposium on Microelectronics
Technology and Devices (SBMicro), 2013, Curitiba-PR, Brasil.
Proceedings of the 2013 Symposium on Microelectronics
Technology and Devices (SBMicro), 2013. p. 1-4.
[3] S.M. Balashov ; O.V. Balachova ; BRAGA, A. V. U. ;
BAZETTO, M. C. Q. ; A. Pavani Filho . The optimized SAW
humidity sensor with nanofilms of graphene oxide. In: IEEE
Sensors 2013 Conference, 2013, Baltimore-MD. IEEE Sensors
2013 Conference Proceedings, 2013. p. 1-4.
11 dropl ets
2500 0
2000 0
34 dropl ets
1500 0
Qua rtz
1000 0
50 00
0
0
0,2
0,4
0 ,6
0,8
1
Relative humidity
Figure 2 – Saturation amplitude a1 for the set of
humidity standards
Contact: [email protected]
51
Development of the sensor for the market has as an
important part the optimization of the process of film
deposition and improvement of the stability of the sensor
response. Another important part is the data treatment. The
humidity sensor based on the graphene oxide (GO) thin
films is the chemical sensor with the microscopic mechanism
of analyte molecules attachment based on the week Van der
Waals forces. It means that it is necessary to choose the
adequate adsorption model for the kinetic curves.
1
0,8
Página
I.
Exponent factor
1,2
A4.4 ALTERNATIVE PHOTOVOLTAICS AND ORGANIC ELECTRONICS
Dr. Fernando Ely (CTI), activity leader
Agatha Matsumoto (CTI), M.Sc. student
Valdirene Peressinotto (CTI), researcher
Iraci da A. Pereira (CTI), researcher
Michele Odinick Silva (CTI), researcher
Thiago C. Cipriano (UFABC/CTI), PhD student
Prof. Dr. Wendel Alves (UFABC), researcher
Prof. Dr. Rubens Maciel Filho (FEQ-Unicamp), researcher
Prof. Dr. Waldir Antonio Bizzo (FEM-Unicamp)
I.
INTRODUCTION
The term organic electronics describes the realization of
electronic devices like transistors sensors, memories and
photovoltaics (OPV) based on semiconducting organic
compounds [1]. Our strategy in organic electronics field is
to generate knowledge and intellectual property for further
technology transfer to the private sector. The topics of
research include new materials, deposition techniques and
testing devices to mainly demonstrate transistors, OPV and
non-volatile memories over large areas.
II.
and eco-friendly electronics. Through an ultrasound-assisted
self-assembling method we have prepared hybrid materials
having (L)-diphenylalanine (FF) and semiconducting
conjugated polymers [2]. Those new bio-organic
nanostructures have semiconducting properties of polymers
while keep the inherent self-organization of biological
systems. In figure 2, is displayed a example of FF:PFO
polymer (PFO = polyfluorene) were highly blue fluorescent
clusters were observed in the solid material while a dense
network of nanotubes with ca. 50 nm in diameter are overt
in the SEM image from drop-casting films. Now, we are
investigating applications of such hybrid materials in
transistors and OPV devices.
ACTION AND RESULTS
A. Transparent and conductive electrodes by ultrasonic
spray
Spray is particularly interesting because it leads to
homogeneous films with delimited large area on different
substrates by using virtually any kind of fluid. We are
studing ultrasonic spraying to prepare transparent
conductive eletrodes (TCE) based on carbon nanotubes
(SWCNT), conducting polymers and metallic nanowires. In
the last year, the conducting polymer PEDOT:PSS and
SWCNTs were the most deeply studied materials in this
context [1]. In Figure 1, we show two examples of ultrasonic
spray deposition on plastic PET substrate. Sheet resistance
values as good as 60 ohm/sq (T = 75%) and 160 ohm/sq (T
= 81%) were achieved for PEDOT and SWCNT,
respectively. Also, subtractive patterning methods based on
photolithograph, laser ablation and screen printing are being
developed for both materials. By using those methods we
are currently able to pattern features from a few hundreds of
microns to 10 µm size which opens up a multitude of
applications on organic electronic devices fabrication.
SWCNT network on PET
Figure 2. SEM image from FF-PFO nanotubes bundles. Rightabove: OM of aggregates of FF-PFO clusters (200x magnification).
Right-below: the same region under UV light.
C. Quantum Dot-Organic Photovoltaics
Semiconducting nanocrystals or quantum dots (QDs)
are ideal materials for photovoltaics because their tuning
ability of the electronic and optical properties. Moreover,
those tiny crystals when mixed with semiconducting
polymers could give rise to high efficient and low cost
photovoltaics by solution processing. CTI and Fraunhofer
IAP have developed synthetic and liable protocols to prepare
CdSe and InP quantum dots for hybrid quantum dotsorganic photovoltaic (QD-OPV) panels by printing
techniques [3]. By our procedure, it is possible to control the
size and properties of QD simply by the reaction time as
dipected in figure 3.
PEDOT:PSS Flexible EL device
Figure 3. CdSe QDs under UV light showing the diamter change
with the reaction time.
III.
Besides the organic -conjugated classes a quite
different alternative has been emerged in the recent years for
device fabrication. This new class of “exotic” materials
comprehends biological or bioinspired materials like paper,
leather, silk, gelatine, DNA and peptides. The motivation
behind the use of such biodegradable materials as substrate,
dielectrics or semiconductors is to generate more sustainable
[2] ELY, F., CIPRIANO, T. C., ALVES, W. A. Patent Appl. # PI
BR 2013 031176-6.
[3] ELY, F. GRECO, T. 2013, unpublished results.
IV.
REFERENCES
[1] McCulloch I. Adv. Mater., 22, 3760–3761, 2010
Contact: Fernando Ely. E-mail: [email protected]
Phone: +55 (19) 3746 6229.
52
B. Bio-organic electronics
[1] ELY, F. et al. Handheld and Automated Ultrasonic Spray
Deposition of Conductive PEDOT:PSS Films and Their
Application in AC EL Devices, Org. Electron, 15, 2014, 10621070.
Página
Figure 1. Transparent conducting electrodes based on the SWCNT
network and PEDOT:PSS polymer by ultrasonic spraying.
MAIN PUBLICATIONS
A 4.5 BROADBAND LOOP ANTENNA OVER A SLOT GROUND PLANE FED
BY VIAS AND CPW
Prof. Dr. Glauco Fontgalland (UFCG), activity leader
Prof. Dr. Raimundo Carlso Silverio Freire, researcher
Prof. Dr. Silvio Ernesto Barbin, researcher
Crezo Medeiros Costa Jr, PhD student
I.
INTRODUCTION
The main goal of the antenna design is effectively
improve the portability of a modern wireless terminal
component and to integrate more than one pattern of
communication in a single system. To cover different
communication standards, there is the need of antennas with
multiband characteristics or even ultra-wideband (UWB), in
a simple and easily integrated structure.
In this work, is presented a compact antenna to wireless
broadband applications. The antenna consists of a small
radiating loop as driver element coupled to a U-shaped
parasitic element (Fig.1a). The slot in the ground plane is
optimized to match the antenna input impedance over a
broadband. The antenna was built on Rogers TMM3
substrate with r = 3.4 and tang  = 0.0023. Its overall
dimensions are 40 mm×40 mm. The coplanar waveguide
CPW transition was made to match the coaxial cable and
VNA connector for measurements purpose.
To smooth the effects of the presence of the
metallization close of the slot a coplanar/coaxial transition to
the feeding point was built, Fig. 3. The transition was made
in FR4 substrate (r = 4.3, tang  = 0.02, and 1.6 mm
thickness).
(a)
(b)
Figure 3. (a) Coplanar/coaxial transition geometry, and (b)
connection between the antenna and the transition. All dimensions
are in millimeters.
The simulated reflection coefficient with less than -10
dB from 2.4 GHz to approximately 5.0 GHz is shown in Fig.
4a. Using the new transition a measured broad bandwidth of
2.2 GHz (2.45 GHz to 4.65 GHz) is obtained. The
discrepancy in the behaviors of the simulated and measured
results may be attributed to imperfections in the transition
and to the soldering connections of metallic vias. The
presence of an SMA connector close to it also affects its
electrical characteristics. The radiation patterns for the
antenna in the xz- and yz-planes are shown in Fig. 4b and
Fig. 4c, respectively. The advantage of this design is to use
only one antenna in various applications.
(b)
(a)
Figure 1. Antenna geometry: (a) top view, and (b) bottom view.
All dimensions are in millimeters.
(a)
II. ACTION AND RESULTS
The reflection coefficient measured results are show in
the Fig. 2.
(c)
(b)
Figure 4. (a) Measured and simulated reflection coefficient, and
radiation pattern, (b) xz-plane and (c) yz-plane.
Figure 2. (a) Measured and simulated reflection coefficient. (b)
Photograph of the connection between the VNA and the antenna.
The reflection coefficient S11 measured result designated
as “measured 1” has 200 MHz bandwidth (3.8-4.2 GHz),
which presents a strong mismatching in comparison to the
simulated result (Fig. 2a). The presence of the bulky
connector close to the slot affects the antenna impedance
matching performance. To smooth the transition two
adapters with diameter smaller than the VNA connector
were used (Fig. 2b). The new S11 measured result,
designated now as “measured 2”, shows a BW of 1.2 GHz.
III. MAIN PUBLICATIONS
[1] COSTA, C. M. ; FONTGALLAND, G.; BARBIN, S. E.;
FREIRE, R. C. S. Meander Loop Antenna with Parasitic Elements
for WLAN/WiMAX Applications. Conference on Electromagnetic
Field Computation CEFC2014. Accepted for publication.
IV.
REFERENCES
[1] Lu, J.H.; LEE, Y.Y. Planar compact triple-band monopole
antenna for IEEE 802.16m worldwide interoperability for
microwave access system. IET Microw. Antennas Propag, Vol. 7,
2013.
Contact: Glauco Fontgalland.
([email protected])
53
(b)
Página
(a)
A4.6 MICROELECTRONIC PACKAGING
Prof. Dr. Antonio Luis Pacheco Rotondaro (CTI), activity leader
Dr. Ricardo Cotrin Teixeira (CTI), researcher
Dra. Vanessa Davanço Pereira de Lima (CTI), researcher
Eliana A. Gomes (CTI), researcher
Giuliano Maiolini (CTI), technician
Marinalva Rocha (CTI) technician
I.
INTRODUCTION
A summary of the work in progress in the Project
Namitec - section A4.6, is presented. The activities during
2013 were: multiphysics simulation of packaged systems to
assess electrical performance and solder contact quality and
adjustments on the UBM layer to build a new mask
compatible with the available devices.
II.
because the stress at these welds may cause failure. Some
manufacturers are adding extra external rows of dummy
solder balls where they do not have electrical connections,
so that the component does not stop working if a fatigue
failure at these points is obtained. We can see that there is a
relationship between the locations of the PCB anchor point
with the location where the fatigue occurs.
The work in progress is the study of the fatigue. Figure 4
shows results for Life Fatigue and Safety Factor for a solder
ball of structural steel. The Ansys have a complete library
with all the necessary properties and curve SN for structural
steel and can thus perform fatigue analysis using the fatigue
module in ANSYS Mechanical.
ACTION AND RESULTS
A. Multiphysics Simulation
Multiphysics simulation of packaging aims to
reduce costs, increase package density and improve
performance while maintaining or improving the reliability
of the circuits. We developed a model where the joint will
be tested in a pre determined temperature cycle (Figure 1).
Analyses were performed with the solder ball material being
Structural Steel or a solder of 63%Sn37%Pb. The following
figures present the results from simulations on Ansys 14.5
with the fixed support on the side as in a memory slot
configuration. Figure 2 shows the result for total
deformation, while Figure 3 shows the stress on the overall
structure.
(a)
(b)
Figure 4: (a) Life Fatigue, (b) Safety Factor
The results obtained for this solder are consistent with
the expected, the crack occurs in the upper and lower face of
the solder, in accordance with the fixed support. This
validates the fatigue. Our next step will be to search the SN
curves and specific properties for lead-free solders and use
them to compare the fatigue response of these materials
when used on the assembly.
B. Flip Chip Assembly
After a detailed inspection on the scholar chip micro
fabricated at the CCS/Unicamp, we draw a new UBM mask
layer compatible with the devices. We are now testing the
process developed earlier with this new mask. The recently
acquired Eagle 860 flip chip machine will also be used to
test the UBM stack.
Figure 1: Thermal Cycle used for the Ansys simulations.
(a)
(b)
Figure 2: Total Deformation. (a) Struct. steel, (b) SnPb solder
Figure 5: New Flip-Chip reticule for UBM layer
(b)
Figure 3: Equivalent Stress. (a) Struct. steel, (b) SnPb solder
After several tests, it was concluded that outside rows of
Solder Ball present higher stress. Caution must be taken
[1] R. C. Teixeira, C. B. Adamo, A. Flacker, W. J. Freitas, A. L. P.
Rotondaro, “Surface Plasma Treatment Of Electroless Ni-P” VIII
Seminatec – Workshop on Micro and Nano Technology, 02-03
may, 2013
Ricardo Cotrin Teixeira, PhD
CTI/DEE , tel: 019-3746-6180/6063
[email protected]
54
(a)
MAIN PUBLICATIONS
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III.
A5 AREA MATERIALS AND FABRICATION TECHNIQUES
Currently, UNICAMP develops technologies for synthesis,
characterization of carbon nanomaterials, and fabrication
and tests of new devices like micro-sensors for gas sensing,
based on CNT or MLG. For fine control of graphene
nanoflakes synthesis via sonication, thorough analysis of
size and thickness distributions of the flakes, as function of
the process parameters, was performed. It was shown that
the size and thickness distribution follow log-normal
distribution, in contrast to more conventional normal
(Gaussian) one. These findings are important to control the
process of graphene synthesis and deposition of thin films
based on graphene. The thermal and electrical contacts
formed between nanotubes or graphene sheets and metal
electrodes were also studied using confocal Raman
spectroscopy, and new method of contact formation for the
films composed by nanotubes, using focued laser beams,
was developed. Another part of work was focused on
research in the field of superconductivity and extraordinary
magnetoresistance in graphene and graphite..
A5-2. Synthesis and characterization of nanostructures
and nanostrutured materials in Si, Ge III-V.
Non-stoichiometric silicon nitride was obtained using
reactive sputtering. By carefully controlling the amount of
nitrogen, argon and oxygen mixture in the sputtering
chamber, the temperature and time of annealing, we have
controlled the composition and the subsequent
photoluminescence spectra. For the first time a strong UV
(324 nm) emission was observed in a Si3NxOy sample with
a relatively high oxygen concentration. Among other
activities related to the synthesis and characterization of
nanostructured materials, some deserve special attention: i)
the production of intricate networks of nanocrystals
connected either directly or in a foreign matrix. ii) the
synthesis of germanium nanocrystals in silica matrices.
Photoluminescent properties of such materials were studied
as a function of annealing conditions, iii) photoluminescent
studies of ZnO tetrapods deposited on a matrix of alumina
and the study of diluted semiconductor structures. iv) the
study of the effect of dislocations on the resistance to plastic
deformation in III-V crystals under low normal loads.
A5.3. Synthesis and characterization of alternative
materials for MOS.
We investigated the thermally-driven H incorporation in
HfO2 films deposited on Si and Ge substrates. Two regimes
for deuterium (D) uptake were identified, attributed to D
bonded near the HfO2/substrate interface region (at 300 0C)
and through the whole HfO2 layer (400–600 oC). Films
A5-4.1. Biomolecules deposition on metallic substrates
for research and development of bioMEMS.
Biomolecules associated with metal nanoparticles (NPs)
are capable of self-assembly creating a material with new
properties. NPs associated with biomolecules by processes
environmentally friendly to produce metallic inks silver,
copper and nickel for use in flexible electronics and sintered
by intense pulsed light (IPL) are under development.
Applications for the use of NPs are broad as biosensor,
printing on flexible substrate, bactericidal agent, molecular
diagnostics, photonic device and RFID and many others.
The synthesized silver NPs are completely soluble in
water and results in an ink solution more dark in high
concentration and yellow at low concentration.
A5-4.2. Synthesis and Characterization of organic
materials for biochemical sensors.
Microelectronic sensors based on ISFET's have three
electrodes, source, drain and gate electrodes. For the
functionalization of these devices is provided a window of
the approximately 10x10µm on gate electrode in the device.
This window allows access to the semiconductor layer on
which is anchored a biologically active molecule with
biospecific activity. The interaction of biologically active
layer with the analyte shifts the potential electrical in the
semiconductor/active layer interface and consequently
variations in the flow of charges through the gate.
Preliminary experimental results obtained with ISFETs are
presented.
55
A5.1. Nanostructured carbon materials (carbon
nanotubes and thin sheets of graphene/graphite).
deposited on Si presented higher D amounts for all
investigated temperatures, as well as, a higher resistance for
D desorption. Moreover, HfO2 films underwent structural
changes during annealings, influencing D incorporation. The
semiconductor substrate plays a key role in this process.
To minimize electrical degradation from thermal
oxidation of 4H-SiC, a thin and stoichiometric SiO2 film
was thermally grown, monitored by X-ray photoelectron
spectroscopy (XPS). To obtain thicker films, SiO2 was
deposited by sputtering. Reduction in the leakage current
and in the flatband voltage were observed in the formed
metal-oxide-semiconductor (MOS) capacitors when
compared to SiO2 films thermally grown or deposited
directly on 4H-SiC, indicating, respectively, improvement in
the dielectric properties and reduction of the effective
negative fixed charge in the structure.
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Dr. Stanislav Moshkalev (UNICAMP), area A5 and A5.1 leader
Prof. Dr. Rogrigo Prioli (PUC-Rio) , activity A5.2 leader
Prof. Dr. Fernanda Stedile (UFGRS), activity A5.3 leader
Dr. Raquel Bugs (CTI), activity A5.4-1 leader
Dr. Jose Casarini (CTPIM), activity A5.4-2 leader
A5.1 NANOSTRUCTURED CARBON MATERIALS (CARBON NANOTUBES
AND THIN SHEETS OF GRAPHENE/GRAPHITE)
Dr. Stanislav Moshkalev (UNICAMP), activity leader
Prof. Dr. Yakov Kopelevich (UNICAMP) , researcher
Dr. Leonardo Fonseca (UNICAMP), researcher
Dr. Alfredo Vaz (UNICAMP, CTI), researcher
Dra. Raluca Savu (UNICAMP), researcher
Dr. Robson R. da Silva (UNICAMP), researcher
Dr. Antonio P. Rotondaro (CTI), researcher
Dr. Victor Ermakov (UNICAMP), researcher
Valdenir Silveira (UNICAMP), PhD student
I. INTRODUCTION
method of contact formation for the films composed by
nanotubes, using focued laser beams, was developed [1,2]. As examples, graphene sheets prepared by sonication from
natural graphite and then deposited between metal
electrodes using di-electrophoresis, are shown in Fig. 1.
Another part of work was focused on research in the field of
superconductivity and extraordinary magnetoresistance in
graphene and graphite [5-7]. The experimental set-up to
observe possible superconductivity in graphene under
application of gate bias is shown in Fig,.2.
Carbon nanomaterials like nanotubes and ultra-thin
graphite or graphene (few-layer graphene or FLG) and
graphene oxide sheets have unique electrical, thermal,
mechanical properties and are considered as building blocks
for new generation of nanoelectronics devices. However,
most of technologies for their integration in new devices still
have to be developed.
ACTION AND RESULTS.
Fig. 1. Single nanotube between two electrodes (a) and G peak
position for sequential illumination of different parts of nanotubes
(from left to right) showing improvement of contacts and reduction
of the nanotube temparatire under laser illumination (b).
The thermal and electrical contacts formed between
nanotubes or graphene sheets and metal electrodes were also
studied using confocal Raman spectroscopy, and new
Fig. 2. Set up for measurements the surface potential map in
graphene under gate bias using AFM.
III. PUBLICATIONS.
1. V. Ermakov, A. Alaferdov, A. Vaz, S. A. Moshkalev,
Nanotechnology, 24, 155301 -9, 2013.
2. J. V. Silveira, R. Savu, M. A. Canesqui, O. L. Alves, J.
Mendes Filho, J. W. Swart, A. G. Souza Filho, and S. A.
Moshkalev, J. Nanoelectr. Optoelectr., accepted, 2014.
3. K. Bogdanov, A. Fedorov, V. Osipov, T. Enoki, K.
Takai, T. Hayashi, V. Ermakov, S. Moshkalev, A. Baranov,
Carbon, accepted, 2014.
4. Alaferdov, A.V., Gholamipour-Shirazi, A., Canesqui,
M.A., Danilov, Y.A., Moshkalev, S.A., Carbon, 69, 525 535, 2014.
5. B. Jabakhanji, A. Mishon, ….., Y. Kopelevich, and B.
Jouault, Phys. Rev. B 89, 085422 (2014)
6. Y. Kopelevich, R.R. da Silva, B.C. Camargo, A.S.
Alexandrov, J. Phys.: Condens. Matter 25 466004-5, 2013.
7. A. Ballestar, P. Esquinazi, J. Barzola-Quiquia, S. Dusari,
F. Bern, R.R. da Silva, Y. Kopelevich, Carbon, accepted
2014.
56
Currently, UNICAMP develops technologies for
synthesis, characterization of carbon nanomaterials [1-4],
and fabrication and tests of new devices like micro-sensors
for gas sensing, based on CNT or FLG. For fine control of
graphene nanoflakes synthesis via sonication, thorough
analysis of size and thickness distributions of the flakes, as
function of the process parameters, was performed [4]. It
was shown that the size and thickness distribution follow
log-normal distribution, in contrast to more conventional
normal (Gaussian) one. These findings are important to
control the process of graphene synthesis and deposition of
thin films based on graphene.
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II.
A5.2 SINTESIS AND CHARACTERIZATION OF NANOSTRUCTURED
MATERIALS BASED ON SI, GE, III-V AND II-VI SEMICONDUCTORS FOR
OPTOELECTRONICS DEVICES APPLICATION
I.
INTRODUCTION
The recent activities of our group involve studies on the
photoluminescence (PL) emission of Eu and Tb
nanoparticles embedded into SiO2, studies on the
mechanical deformation mechanisms and defects in ZnO
crystals and growth of semiconductor oxides by electrodeposition aiming the development of novel photovoltaic
cells.
In the search for luminescence of silicon-compatible
materials, novel elements were used in order to obtain a
more intense and efficient photoluminescence (PL). In
particular, Er ions implanted at room temperature into SiO2
matrices gave place to the first successful PL result reported
in 1983. In the 90's, the study of the PL from rare earth ions,
in particular Eu and Tb ions, implanted into Si compatible
matrices started to be intensively investigated. Recently, it
was shown by our group that hot implants of Si and Ge into
SiO2 matrix followed by a further anneal in order to form
the corresponding nanoparticles (NPs) bring as a
consequence a strong PL yield enhancement, as compared
with the ones obtained by room temperature implants.
Regarding the hot implantation process, by studying the
PL and structural characteristics of Tb and Eu implanted
into SiO2 matrix, we have found that the implantation
temperature improves the PL yield in a moderated way, that
the small NPs grow already during the implantation step and
that the annealing atmosphere plays an important role on the
PL shape emitted by Eu NPs, while it does not affect the one
inducedby Tb NPs. To further advance on this topic, we are
presenting the PL and decay lifetime of Tb and Eu NPs at
low temperatures.The NPs were obtained by ion
implantation into a SiO2 matrix During the implantations,
the samples were kept at temperatures between RT and 350
oC. Afterwards, the samples were annealed for 1h at 500 oC
in an O2 atmosphere. For the PL measurements, the samples
were excited with a 266 nm solid-state laser with 7mW of
excitation power. The sample's emission was dispersed by a
30 cm monochromator and then detected by a CCD camera.
Another approach that can be used to modify and control
the PL emission of a semiconductor material is by the
introduction of mechanical defects. Dislocations can readily
be introduced by nanoindentations. They act as carrier
recombination sites and the piezoelectric fields produced by
their strain fields will affect the local band structure, thus
influencing carrier transport. On this topic, nanoindentations
were performed on various crystallographic orientations of
single crystal ZnO aiming on the understanding of the
mechanical deformation mechanism of the ZnO crystals. We
The nanoindentation was performed at room temperature
with a nanoindenter. The resulting residual nanoindentation
impressions were imaged by AFM. Transmission electron
microscopy imaging was performed to observe the resulting
crystal microstructure.
II. RESULTS
The results obtained by our group were very significant
and are highlighted below.
Fig.1 shows the PL spectrum originated from the Eu
NPs. As can be observed, the blue–green region (400–550
nm) presents a broad PL emission band which is due to (5d–
4f) Eu2þ transitions. In addition, a variety of radiative
defects also contribute to this band. On the other hand, the
presence of narrow emission bands in the red spectral region
(570–750 nm) is due to the Eu3þ, 5Do–7Fn intra-4f shell
transitions.
To perform the low temperature set of experiments, the
sample was introduced into the cryostat and the temperature
was varied. As can be observed in Fig. 2, both PL bands
start to increase their yields from 12 K reaching up to their
maximum at around 100 K (Fig. 2 on the left). Then, for
higher temperatures the PL yield decreases (Fig. 2 on the
right), reaching a minimum at 300 K, at a level compatible
with the one obtained at 12 K.
57
SINTESIS
AND
CHARACTERIZATION
OF
NANOSTRUCTURED MATERIALS BASED ON SI,
GE, III-V AND II-VI SEMICONDUCTORS FOR
OPTOELECTRONICS DEVICES APPLICATION.
have studied the nanoindentation induced plastic
deformation in polar and non-polar ZnO Crystals. The
indented orientations were (1120) a-plane, (1010) m-plane,
and (0001) +c-plane (Zn-face).
Página
Prof. Dr. Rodrigo Prioli (PUC-RJ), activity leader
Prof. Dr. H.Boudinov (UFRGS)
Prof. Dr. Carlo Requião (UFRGS)
Prof.Dr. Andre Pasa (UFSC)
The results presented above on the Eu NPs emission, two
spectral regions were identified, one with narrow emission
bands (from 570 to 750nm) and the other with a broad
emission band (from 400 to 550 nm).Both PL regions show
a minimum yield at 12K, and next it rises with increasing
temperatures, reaching the maximum at around 100K. Then,
the PL yields start to decrease, reaching at 300K a value
similar to the one obtained at 12K. For the Eu NPs PL
lifetime, two different results were obtained. The long
wavelength spectral region shows a life time of the order of
1.0 ms independent of the temperature. Conversely, the
short wavelength one is strongly temperature dependent,
being of the order of several milliseconds for temperatures
lower than 100K down to 0.05ms at 300K. (Any further
information contact Prof. H.Boudinov)
Fig. 4 shows a scheme of the activated slip systems for
the polar (top) and non-polar m-plane and a-plane crystals.
As shown in our earlier report, the PL can also be
modified by the introduction of dislocations. To further
advance on this topic, nanoindentations were performed in
polar and non-polar ZnO crystals. Figure 3, shows TEM
images of the microstructure resulting from the indentations
on the polar +c-plane (top), m-plane (middle), a-plane
(botton) ZnO.
58
Contact: R.Prioli ([email protected], (21) 3527-1272)
H. Boudinov ([email protected], (51) 3308-6547)
A. Pasa ([email protected], (48) 3721-9544)
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An analysis of the TEM images show that the
nanoindentation on the polar faces lead to the slip of
pyramidal and basal planes along a-directions exhibiting a
six-fold symmetry while the nanoindentations on the nonpolar faces mainly initiate slip of basal planes along adirection for the m-plane and m-direction for the a-plane
crystals.
It is interesting to see that unexpected slip of basal
planes was observed on the indentation the non-polar mplane and a-plane crystals. The critical resolved shear
stresses for those planes indicate that they were expected to
have a low slip probability. Our results show that, under a
highly localized stress, generated by our sharp indentation
tip, the slip planes are activated so that the crystal can adapts
to the tip shape. In summary, the mechanical deformation
process induced by highly localized nanoindentation stress
fields has been studied for polar and non-polar ZnO single
crystals. Hardness of non-polar ZnO turns out to be smaller
than that of c-plane one. The results reveal that the
difference in the hardness values of the polar and nonpolarZnO surfaces is due to the orientation of the basal
planes with respect to the indentation axis. The higher
hardening rates of the c- plane are due to the nucleation of
pyramidal dislocations, in addition to basal dislocations,
which is the only slip system in the indentation on m-plane
ZnO single crystal. It is confirmed that most dislocations
introduced by indentation are screw type perfect dislocations
that formed by slipping in the basal planes along the
11 0> directions. These dislocations are highly localized
below the indentation, only propagating in indentercontacted basal planes, and acting as nonradiative
recombination centers. Compressive strains were introduced
along c directions next to the indent, and tensile strains
were introduced along
directions, modifying the crystal
lattice and band gap. These results are important for
understanding the mechanical properties of ZnO and will be
valuable for the device fabrication.
(Any further
information contact Prof. R. Prioli)
A5.3 SYNTHESIS AND CHARACTERIZATION OF ALTERNATIVE
MATERIALS FOR MOS
Prof. Dr. Cláudio Radtke (UFRGS), activityleader
III. IMPROVEMENT OF THE SIO2/SIC INTERFACE BY A
Prof. Dr. Henri Boudinov (UFRGS), activity leader
THIN SIO2 FILM THERMALLY GROWN PRIOR TO
Profª Drª. Fernanda C. Stedile (UFRGS), activity leader
OXIDE FILM DEPOSITION
Profs. S. G. dos Santos and Victor Sonnenberg(USP),
E. Pitthan, R. Palmieri, S.A. Corrêa, G.V. Soares, H.I.
participants
Boudinov, and F.C. Stedile
I. THERMALLY-DRIVEN H INTERACTION WITH
ECS. Solid-State Lett. 2, P8 (2013)
HFO2 FILMS DEPOSITED ON GE(100) AND SI(100)
To minimize electrical degradation from thermal
G.V. Soares, T.O. Feijó, I.J.R. Baumvol, C. Aguzzoli, C.
oxidation of 4H-SiC, a thin and stoichiometric SiO2 film
Krug, and C. Radtke
was thermally grown, monitored by X-ray photoelectron
Appl. Phys. Lett. 104, 42901 (2014)
spectroscopy (XPS). To obtain thicker films, SiO2 was
deposited by sputtering. Reduction in the leakage current
and in the flatband voltage were observed in the formed
metal-oxide-semiconductor (MOS) capacitors when
We investigated the thermally-driven H incorporation in
compared to SiO2 films thermally grown or deposited
HfO2 films deposited on Si and Ge substrates. Two regimes
directly
on
4H-SiC,
indicating,
respectively,
for deuterium (D) uptake were identified, attributed to D
improvement in the dielectric properties and reduction of
bonded near the HfO2/substrate interface region (at 300 0C)
the effective negative fixed charge in the structure.
and through the whole HfO2 layer (400–600 oC). Films
deposited on Si presented higher D amounts for all
investigated temperatures, as well as, a higher resistance for
D desorption. Moreover, HfO2 films underwent structural
changes during annealings, influencing D incorporation. The
semiconductor substrate plays a key role in this process.
Fig. 1: Si 2p photoelectron spectra (a.u. stands for arbitrary
units) at a takeoff angle sensitive to the surface of Si-faced 4HSiC samples thermally oxidized at 1100°C in 100 mbar of
18O2 for different oxidation times, as indicated.
1 .0
C/COX
0 .8
0 .6
Hafnium aluminates (AlxHf1-xOy) were obtained on (100)
silicon wafer surfaces by ALD for different hafnium molar
ratios (25, 50 or 75%) and for different treatments (1000ºC,
60s in N2 or N2+O2 or laser). MOS capacitors were
electrically characterized using AlxHf1-xOy as gate
dielectrics. From CV curves, the admittance that represents
the leakage process was modeled according to FrenkelPoole emission, Fowler-Nordheim tunneling and/or constant
leakage admittance as function of the frequency.
0 .2
-4
-2
0
2
4
V o lta g e [V ]
6
8
Fig. 2: C-V curves of Al/SiO2/4H-SiC (Si face) structures.
SiO2 films deposited by sputtering on SiC (dotted-dashed
green line); with SiO2 formed by thermal oxidation (dotteddotted-dashed red line); and with SiO2 films thermally grown
for a short oxidation time followed SiO2 deposition (blue
dashed line).
Contact:[email protected], 51 33087220
59
II. BOLETIM TÉCNICO DA FATEC, V. BT35, P. 22, 2013
V.CHRISTIANO, V. SONNENBERG, S.G. DOS SANTOS
FILHO
0 .4
Página
Fig. 1: D areal densities as a function of D2 annealing temperature
for (a) 5 and (b) 100 nm thick HfO2 films deposited on Ge (circles)
and Si (squares). The difference between D areal densities in Si and
Ge based samples is represented by triangles.
A5.4.1 BIOMOLECULES DEPOSITION ON METALLIC SUBSTRATES FOR
RESEARCH AND DEVELOPMENT OF BIOMEMS
Dra. Raquel Kely Bortoleto Bugs (CTI), activity leader
Dr. Milton Roque Bugs (CTI), researcher
Dr. Jacobus Willibrordus Swart (CTI), researcher
Ms. Aristides Pavanni Filho (CTI), researcher
Adriano Costa Pinto (CTI), technician
Maria das Graças de Almeida (CTI), technician
B. The silver NPs self-assembly
(A)
I. INTRODUCTION
Nanotechnology has the potential to create innovative
tools and the ability to change and innovative products.
Biomolecules associated with metal nanoparticles (NPs) are
capable of self-assembly creating a material with new
properties. The group Nanotechnology Applied Division of
Microsystems - DMS is working in R&D of NPs associated
with biomolecules by processes environmentally friendly to
produce metallic inks silver, copper and nickel for use in
flexible electronics and sintered by intense pulsed light
(IPL). Applications for the use of NPs are broad as
biosensor, printing on flexible substrate, bactericidal agent,
molecular diagnostics, photonic device and RFID and many
others.
(B)
II.ACTION AND RESULTS
The synthesized silver NPs are completely soluble in water
and results in an ink solution more dark in high
concentration and yellow at low concentration. Figure 1
shows the Raman spectrum of the formation of silver NPs
and the ink solution. Figure 2 A and B shows the images of
electron microscopy (EM) for the silver NPs before and
after IPL sintering. The sintered NPs on the SEM pin stub
mount and measuring the resistivity of the trail are shown in
Figure 2 C and D.
A. Materials and methods
The process in obtain NPs have conducted in open ambient
and with non-toxic substance. EM measurements (SEM
Inspect F50) were performed at the Laboratory of Electron
Microscopy (LME) of the National Synchrotron Light
Laboratory - LNLS, Campinas-SP.
(D)
Figure 2. EM images of silver NPs before (A) and after (B) the
sintering process with the SEM pin stub mount (C), and the
resistivity measured of the sintered silver trail (D).
Página
Figure 1. Raman spectrum and the silver ink produced with the
NPs.
60
Contact: [email protected], [email protected]
+55 19 3746 6202.
A5.4.2 SYNTHESIS AND CHARACTERIZATION OF ORGANIC MATERIALS
FOR BIOCHEMICAL SENSORS
INTRODUCTION
The biosensors based on ion-sensitive field-effect transistor
(ISFET), as well as the implementation of biosensors based
on nanoparticles of titanium dioxide, carbon nanotubes, or
graphene occupying a large part of contemporary scientific
production. Microelectronic sensors based on ISFET's have
three electrodes, source, drain and gate electrodes. For the
functionalization of these devices is provided a window of
the approximately 10x10µm on gate electrode in the device.
This window allows access to the semiconductor layer on
which is anchored a biologically active molecule with
biospecific activity. The interaction of biologically active
layer with the analyte shifts the potential electrical in the
semiconductor/active layer interface and consequently
variations in the flow of charges through the gate.
Biosensors based on TiO2 nanoparticles are of particular
interest for the study of antioxidants compounds. Also, are
reported the properties of TiO2 as a collector of mercury,
lead, copper and cadmium in aquifers, likewise the
biospecific properties of the ds-DNA immobilized on
biosensor for the determination of heavy metals.
II.
ACTION AND RESULTS
- The photostability of adenine and guanine anchored on
gold and silicon substrates, as well as the absorption of
thymine on gold substrate and copper was studied by
photoemission and photoabsorption techniques, XPS and
NEXAFS.
The immobilization of ds-DNA on InAs substrate has been
characterized by photoabsorption and photoemission
spectroscopic techniques, NEXAFS and XPS.
The spectroscopic characterization of the ds-DNA and their
bases are described. Theoretical studies identified the related
bases to molecular orbital HOMO and LUMO in the dsDNA. The respective molecular orbitals of the ds-DNA
bases are described in the theoretical works.
Nanostructured TiO2 thin films deposited on glass substrate
coated with ITO. ds-DNA immobilized on TiO2 thin film
deposited on glass substrate coated with ITO. Layer of dsDNA deposited on glass substrate coated with ITO. Layer of
TiO2 deposited on steel. Layer of ds-DNA deposited on
steel. The samples is attach directly to the sample holder
using a conducting double-side tape. In addition, silver glue
is used on the corner of the sample to insure for a good
electrical contact.
Photoabsorption measurements are performed using
synchrotron radiation at SGM (250-1000 eV) beamline.
The experimental set-up should include a sample
manipulator in an UHV chamber. Acquisition of NEXAFS
data is perform at the titanium, carbon and nitrogen K-edges
by measuring simultaneously the total electron yield (TEY)
and the photon flux by an Au grid monitor, placed in the
path of the incident beam.
III. SUMMARY OF RESULTS OBTAINED IN THE
PERIOD
We have continued our research in obtaining and
electrochemical characterization of electrodes through
obtaining voltammograms, using a potentiostat AUTOLAB
PGSTA-T130, and Ag/AgCl as reference electrode and Pt as
counter electrode. The working electrode dsDNA/TIO2 /
ITO was set properly and immersed in a solution of
methylene blue.
61
I.
Taking the values found in the literature for the TiO2 and
the ds-DNA is performs the energy calibration.
- The particle size of semiconductor TiO2, 80-90 nm, was
performed through the dynamic light scattering (DLS) with
SZ-100 HORIBA equipment.
- The Raman spectroscopy was applied with equipment of
the Laser Laboratory in DF-ICE/UFAM. Limitations in the
sensitivity of the equipment made it impossible to obtain
satisfactory results. This technique would allow us to study
vibrational moments of the functional groups involved in the
anchoring of the active layers.
- Electrical characterization of the devise: electrical
characterization of ISFETs was performed satisfactorily
using a manual wafer prober of the Cascade and the Agilent
B1500. IV curves were obtained by ISFETs with gate
formed of TiO2; we studied the influences of the thickness
of the semiconductor layer on the drain current. Studies
related to the influence of the pH of the DNA solution on
measures of drain current.
- Were performed measurements of cyclic voltammetry at
electrodes ds-DNA/TiO2/ITO employing AutoLab 100
potentiostat. The electrode was exposed to UV light at 254
nm by 10 minutes. Comparatively other electrode, with the
same structure was immersed in 0.1 molar solution of
caffeine and irradiated with UV 254 nm by 10 minutes. We
observed a protective effect of antioxidant on ds-DNA in
oxidation potentials on the electrode immersed in caffeine
solution.
- At this moment we work for implementation of research in
molecular imprinting polymer (MIP). In this process the
interacting and cross-linking monomers are arranged around
a molecular template, followed by polymerisation to form a
cast-like shell. The template is usually the target molecule to
be recognized by the synthetic antibody, or a derivative
thereof.
- Explore the potential of electrodeposition systems for
obtaining semiconductor thin films employed as nitride/
oxide layers.
– Implantation of Research Group in Bioelectronics,
Photovoltaic Devices and Material Chemistry at the
Department of Chemistry in the Institute of Sciences of the
Federal University of Amazonas. The creation of this
research group has allowed open new research lines, as well
as offer new lines in the postgraduate programs in both
UFAM and the regional institutions.
Furthermore, the creation of this research group allows
fundraising for the research focusing on the development
and functionalization of bioelectronics sensors.
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Prof. Dr. Jose R Casarini (CTPIM), activity leader
Prof. Dr. Walter R Brito (CTPIM), researcher
The oxidation of dsDNA is a complex process involving a
series of reactions. However, in general, the initial
measurements carried out show that the peaks related to the
oxidation of dsDNA decreases with the presence of the
antioxidant. Thus, it is observed that the addition of the
antioxidant hampers dsDNA degradation.
On the other hand lithographic processes on ITO have
allowed the development of sensors with controlled surface
area, Figure 1.
Through the design of electrodes on the ITO layer has been
possible to do the electrodeposition on the reference and
counter electrode, and the controlled deposition of active
layers, as working electrode.
- Eva Mateo-Martí, C.-M. P. J.-A. M.-G., Ultraviolet
Photostability of Adenine on Gold and Silicon Surfaces.
ASTROBIOLOGY, 9, 6, 2009.
- Oksana Plekan, V. F. S. P. N. T. C. M. K. C. P.,
Photoemission Study of Thymidine Adsorbed on Au(111)
and Cu(110). J. Phys. Chem. C 2010, 114, 15036–15041.
- EunKyung Cho, A. B. T. F. K., Chemical Characterization
of DNA-Immobilized InAs Surfaces Using X ray
Photoelectron Spectroscopy and Near-Edge X ray
Absorption Fine Structure. Langmuir 2012, 28,
11890−11898.
- Nakamura T, N. K. S. I., DNA HOMO as a new landmark
for nucleic acid properties. ab initio calculations and
experimental mapping. Nucleic Acids Symp Ser. 42, 119120 (1999).
- W. R. Brito, G. A. W. G. Q. C. L. Y. A. M. C. M. L. M.
R., Spectroscopic Evidence of Photodegradation by
Ultraviolet
Exposure
of
Tris(8-hydroxyquinoline)
Aluminum (Alq3) Thin Films. J. Braz. Chem. Soc., Vol. 21,
No. 12, 2367-2372, 2010.
- W.R. Brito, W. G. Q. C. L. C. R. P. M. C. M. L. M. R.,
Ultraviolet photodegradation of tris(8-hydroxy-quinolinate)
aluminum (Alq3)thin films studied by electron and laser
stimulated desorption. Optical Materials 35 (2012) 29–32.
Figure 1. Lithography on ITO with photoresin AZ-1518 and
revelator AZ-351 for develop the sensors base electrodes.
IV.
ACKNOWLEDGEMENTS.
We acknowledge the contribution of CNPq - INCT
NAMITEC for the scholarships: one postdoctoral; and three
IC´s what allowed advancement of experimental work, and
also for the materials needed.
V.
- V.S. Lusvardi, M. A. B. J. G. C. j. E. J. . B. F. T., An
NEXAFS investigation of the reduction and reoxidation of
TiO2(001 ). Surface Science 397, 237-250 (1998).
- Newton T. Samuel, C.-Y. L. L. J. G. D. A. F. D. G. C.,
NEXAFS characterization of DNA components and
molecular-orientation of surface-bound DNA oligomers.
Journal of Electron Spectroscopy and Related Phenomena
152, 134–142 (20061).
REFERENCES
- Jifeng Liu, Christophe Roussel, GreÄ goire Lagger,
Philippe Tacchini, Hubert H. Girault.. Antioxidant Sensors
Based on DNA-Modified Electrodes, American Chemical
Society, Analytical Chemistry A.
- Casarini, José Roberto. Incorporação da Microeletronica
na Qualificação da Biodiversidade Amazonica. Premio
Samuel Benchimol de Sustentabilidade Categoria
Econômica . 2009.
- Haupt K., Molecular Imprinting. Topics in Current
Chemistry, Vol. 325, 2012.
Página
- Jifeng Liu, C. R. G. L. P. T. H. H. G., Antioxidant Sensors
Based on DNA-Modified Electrodes. Analytical Chemistry
A.
62
- Fernandes, J., Transistor de Efeito de Campo (FET) para
Detecção Química e Bioquímica utilizando Dielétrico de
Porta constituído de Camada Empilhada SiNx/SiOxNy. Tese
Mestrado (2009).
A6 AREA – HUMAN RESOURCES DEVELOPMENT
This area is coordinated by Jacobus W. Swart from UNICAMP and by Roberto Panepucci from CTI.
NAMITEC supports the formation of large number of students at different levels, including PhD, Master of
Science and Scientific Initiation for undergrad students, called IC in Brazil. Also pos-doc fellows are involved and
participate in the project. The table bellow shows the number for each category. Considering the total numbers of
concluded degrees it shows that the goals are not totally achieved, but are very near. In reality the actual numbers
can be a little higher than given in the table, except and in contrary for the students in progress or active, due to
some incompleteness of information received from the members.
Pos-docs
PhD
Master
IC
Active
Concluded in 5th year
12
78
50
36
5
26
48
66
Concluded during 5
years
41
99
258
247
Goal – 5 years
100
250
250
INCT NAMITEC has also promoted the interchange of students between member institutions. This contributed
to improve the work and formation of the students.
The INCT program provided a limited amount of fellowship, from CAPES and CNPq, some of which sponsored
by “Ciência sem Fronteiras” Program. The following tables indicate the number of fellowships granted during the 5
years of the project:
EV
Pos-docs
PhD
Master
IC
ITI-A
DTI
PDJ
CNPq
1
125
21
44
5
CsF
2
10
-
CAPES
17
2
6
-
COLOQUIA ON MICRO AND NANOELECTRONICS
NAMITEC started a series of seminars called Colloquium on Micro and Nanoelectronics that are organized
regularly at one of the participating institutions and broadcasted through internet on-line. The tool used for this
broadcasting is called WebConf and is provided by RNP. These colloquia aims to teach about subjects related to the
activities going on at NAMITEC, including some obtained results, to the internal community of NAMITEC and
also to any interested person of society. The broadcasting is open and the seminars stay available in the web at the
following site: http://www.namitec.org.br
The list of seminars held up to now are as follows, with 7 held during 2013:

"Ultra-thin Chips - a New Paradigm in Silicon Technology", Joachim N. Burghartz (University of Stuttgart and
IMS CHIPS, Germany), UNICAMP, 10/09/2013

Leading Edge Technologies for a Smarter Planet, Fernando Guarín (IBM, USA), UNICAMP, 10/09/2013

“Future of Nano CMOS Technology”, Hiroshi Iwai (TIT, Japan), UNICAMP, 09/09/2013

Edmundo Gutiérrez – “Atomistic Magnetoconductance Effects in Strained FETs”, Edmundo Gutiérrez
(INAOE, Mexico), UNICAMP, 09/09/2013
63

“3D Stacking of Silicon Chips – An Industrial Viewpoint”, Werner Weber (Infineon, Technologies),
UNICAMP, 02/09/2013
Página
“Thin Channel InAs HEMT for Sub TeraHertz and Post CMOS Applications”, Edward Chang (NCTU,
Taiwan, UNICAMP, 09/09/2013

Emerging Memories, Victor Zhirnov (Semiconductor Research Corporation-SRC, USA), UNICAMP,
06/06/2013

Polymeric Solar Cells: Device Physics and Technological Issues Profa. Magali Estrada del Cueto,
(CINVESTAV, Ciudad del Mexico, México). UNICAMP, 24/10/2012

Design-oriented Compact Modeling for Multi-Gate MOS Devices, Prof. Antonio Cerdeira Altuzarra
(CINVESTAV, Ciudad del Mexico, México). UNICAMP, 24/10/2012

The Electronics Department At INAOE Alfonso Torres Jacome, (Electronics Department, INAOE, PueblaMéxico). UNICAMP, 03/09/2012

Advances in Silicon Technology for Wireless David Harame, (IBM Semiconductor Research and
Development Center, Vermont-USA). UNICAMP, 03/09/2012

Nanometer-Thin Pure-Gallium and Pure-Boron CVD Layers: New Materials for Silicon/Germanium Device
Integration, Liz Nanyer (Delft University of Technology, Holanda). UNICAMP, 23/08/2012

Circuitos Integrados Fotônicos em Silício, Roberto Ricardo Panepucci (CTI Renato Archer). CTI, 03/07/2012

ESD+RFIC Co-Design. An IEEE EDS Distinguished Lecture. Albert Wang, PhD, Fellow-IEEE (University
California-Riverside-USA). CTI, 13/05/2011

Grafeno: Prêmio Nobel em Física de 2010 e Perspectivas Tecnológicas. Prof. Yakov Kopelevich (UNICAMP).
CTI, 20/04/2011

SOI MOSFET: do Planar ao FinFET, Prof. Dr. João Antonio Martino ( PSI/EPUSP). CTI, 13/12/2010

More Moore and More Than Moore, Antonio Luis Pacheco Rotondaro, PhD (CTI Renato Archer). CTI,
29/10/2010

Analysis and design of CMOS analog building blocks, Prof. Dr. Márcio Cherem Schneider (UFSC). CTI,
30/04/2010

Compact models of DC, AC, noise and mismatch for the MOSFET. Prof. Dr. Carlos Galup Montoro (UFSC).
CTI, 25/3/2010

Nanotubos de carbono: síntese, caracterização e aplicações, Prof. Dr. Stanislav Moshkalev (CCS/Unicamp).
CTI, 16/10/2009

Redes de Sensores sem Fio, Profa. Dra. Linnyer Beatrys Ruiz (UEM). CTI, 13/11/2009
ORGANIZATION OF SHORT COURSES
I Escola Paulista de Micro e Nanoeletrônica, March 25 and 26, 2013, EPUSP, São Paulo, SP.

Workshop on Microfabrication: Design and Fabrication of MOS ICs, January 20 to 31, 2014, CCS/UNICAMP,
Campinas, SP. This course was also offered for regular undergraduate and graduate students of
FEEC/UNICAMP during the regular semesters, using the CCS laboratory funded through NAMITEC. A total
of about 45 students were enrolled through the three times the course was offered during the year (number of
students is limited because of the experimental complexity involved).

VIII Escola de Microeletrônica do Nordeste - EMicro-NE 2013, de 14 a 16 de November 14-16, 2013, UFRN,
Natal, RN.

XV Escola de Microeletrônica Sul, EMicro 2013, April 29 to May 3, 2013, Porto Alegre, RS

“VIII Workshop on Semiconductors and Micro & Nano Technology - SEMINATEC 2013”, May 2-3, 2013,
Campinas, SP.

UFRGS/CT1 – many members of NAMITEC gave lectures and/or disciplines at the training program of ICBrazil program.

CTI/CT2 – many members of NAMITEC gave lectures and/or disciplines at the training program of IC-Brazil
program.
Página

64
NAMITEC has active participation and responsibility in organizing short courses, as listed below:
ORGANIZATION OF CONFERENCES
Annual World Conference on Carbon 2013, Rio de Janeiro, July 14-19, 2013

28th Symposium on Microelectronics Technology and Devices – SBMicro2013, Curitiba, PR, September 0206, 2013.

26th Symposium on Integrated Circuits and Systems Design, SBCCI2013, Curitiba, PR, Brazil, September 0206, 2013.

21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Istanbul, Turkey,
October 7-8, 2013.

5th IEEE Latin American Symposium on Circuits and Systems – LASCAS2014, Santiago, Chile, February 2528, 2014.

20th IBERCHIP Workshop, Santiago, Chile, February 25-28, 2014.

International Caribbean Conference on Devices, Circuits and Systems – ICCDCS2014, Playa del Carmen,
México, April 2-4, 2014.
Página

65
Members of INCT NAMITEC were responsible for the organization of many conferences, serving as general chair,
program chair, publication chair, publicity chair or program or organizing committees. Following is a partial list of
these conferences:
A7 AREA – TECHNOLOGY TRANSFER TO INDUSTRIAL
SECTOR
The coordination of this area was conducted by Rubia Quintão, who had a pos-doc fellowship by CAPES
initially followed by a DTI fellowship of CNPq, until the time that budget for these fellowships was available for
NAMITEC.
A detailed description of the activities conducted by Quintão, are described in her final repost sent to CAPES
and at the following publication:

QUINTÃO, R.; MIRANDA, K.; SILVEIRA, M. Análise de interações entre Instituições Científicas e
Tecnológicas e o setor produtivo: o caso do INCT NAMITEC. In: ALTEC 2013- XV Congresso LatinoIberoamericano de Gestão de Tecnologia, 2013, Porto. Anais do ALTEC-2013, 2013.
After leaving the INCT NAMITEC, Rubia Quintão was hired by CGEE. We believe that her experience
obtained with the work at NAMITEC was considered of interest by CGEE and will be helpful for her new job.
COOPERATION WITH COMPANIES
For this annual report a survey was send to all NAMITEC members to receive information about the interactions
and collaborations activities held with enterprises, informing the company, the institution, the responsible member
of NAMITEC, related NAMITEC activity, subject of the collaboration and type of interactions or collaboration.
From this survey, the following information was reported.




o
José Alexandre Diniz, Nilton Morimoto, Altamiro Susin
o
IC fabrication processes and IC design
o
Training of staff members, consultancy, participation at NAMITEC WS and other events.
Chipus Microelectronics – UFSC
o
Carlos Galup-Montoro, Márcio Cherem Schneider, Osmar Franca Siebel
o
Short course - 30 hours
o
November 25 - 29 & December 2-6 /2013
o
Title: LOW-POWER INTEGRATED CIRCUIT DESIGN
DS Pro Audio Ltda CNPJ: 10462858/0001-21Tecnologia em audio (http://www.dspro.com.br/ - Porto
Alegre,RS) - UFRGS/Delet/LaPSI
o
Altamiro Amadeu Susin - NAMITEC activity A1.3
o
CODECIPTV - Codificador Decodificador de áudio e vídeo IPTV
o
Join development project for video codec to upgrade the present line of DS Pro products. The products
are used to capture and digitize dozens of microphone signals on shows and mega events. TV
broadcasting companies would like to have video signal also. The project passed the first round to
receive financial support.
INO, Inc. (Quebec, Canada) - CCS/Unicamp and Mackenzie
o
Pierre Kaufmann - NAMITEC activity A4.2.2
o
Transmission tests of CCS developed resonant metal mesh band-pass filters
o
Cooperation in progress/tests of 3 and 7 THz metal mesh filters.
Nacional de Grafite Ltda (Itapecerica, MG) – CCS/UNICAMP
o
Stanislav Moshkalev – NAMITEC activity A5.1
o
Characterization of new forms of nanographite and grafene, development of new materials based on
grafene.
o
A proposal for collaboration agreement is being worked-out
Neuron Ltda. (São José dos Campos, São Paulo, Brazil) - CCS/Unicamp and Mackenzie
o
Pierre Kaufmann - NAMITEC activity A(4)-2.2
o
Space THz photometers telemetry
o
Iridium satellite short-data-burst service module development for Solar-T experiment flight in
stratospheric balloon missions/project completed, tested, approved.
66

CEITEC SA (Porto Alegre, RS) – CCS/UNICAMP, UFRGS, LSI/USP, outros
Página







o
Gilson Wirth – NAMITEC activity A2.1
o
Modeling and Statistical Characterization of low frequency noise in state of the art MOSFETs,
o
Sandwich PhD work by Maurício B Silva.
Propertech Ltda. (Jacareí, São Paulo, Brazil) - CCS/Unicamp and Mackenzie
o
Pierre Kaufmann - NAMITEC activity A(4)-2.2
o
THz space solar flare photometers (Solart-T Project)
o
System integration, data acquisition, conditioning, telemetry/Development, construction, tests
accomplished
Propertech Ltda, (Jacareí, São Paulo, Brazil) - CCS/Unicamp and Mackenzie
o
Pierre Kaufmann - NAMITEC activity A(4)-2.2
o
THz ground-based solar flare telescope (HATS Project)
o
Front-end THz sensor system, filters for simultaneous multiple frequency operations, telescope
integration to positioner, data acquisition and transmission. High altitude and South Pole
operations/Project in current development, first phase to be completed later in 2014 (complete
operational system)
SMART (Atibaia, SP) – CCS/UNICAMP
o
Stanislav Moshkalev – NAMITEC activity A5.1
o
Integration of carbon in emerging memory devices
o
A proposal for collaboration agreement is established
Texas Instruments (Dallas) – UFRGS,
o
Gilson Wirth – NAMITEC activity A2.1
o
Low frequency noise (RNT) in LC-Tank oscillators,
o
Sandwich PhD work by Dalton M Colombo.
Treetech – LSI/IPT/CTI/CCS:
o
Sebastião G. dos Santos Filho/Nilton I. Morimoto – NAMITEC activity A4.1.3
o
Development of a hydrogen sensor
o
Partnership for the development of a system for real-time monitoring of the isolation of high voltage
plugs in high-voltage transformers using chemioresistors for hydrogen detection operating around
100oC away from the the insulating mineral oil.
Treetech – LSI/IPT/CTI/CCS
o
Sebastião G. dos Santos Filho/Nilton I. Morimoto – NAMITEC activity A4.1.3
o
Development of acetylene and hydrogen sensors mounted in a same packaging
o
Partnership for the improvement of a system for real-time monitoring of the isolation of high voltage
plugs in high-voltage transformers using a potentiostatic cell with three electrodes for acetylene
detection and a chemioresistors for hydrogen detection, both mounted in the same packaging.
Vector/Braxenergy
o
Milton Roque Bugs and Raquel Kely Bortoleto Bugs – NAMITEC activities: A4.3(2) and A5.4(1)
o
Low-cost photovoltaic cells (Células Fotovoltaicas Nanoestruturadas de Baixo Custo) – CFNBC
o Agreement signed between CTI and Vector/Braxenergy: 1st phase: collect technological subsidies
necessary for the project (adjustments to the laboratory, budgeting of materials and labor); 2nd phase:
submit complete project to BNDES.
67

NXP Semiconductors (Eindhoven) – UFRGS,
Página

A8 AREA – KNOWLEDGE TRANSFER TO SOCIETY
This area is coordinated by Jacobus W. Swart from FEEC/UNICAMP and Linnyer Beatrys Ruiz from UEM and
includes the following activities: Organization of Scientific Conferences, delivering of lectures and talks at
scientific conferences, participating on round table discussions, participation on exhibitions, press releases and web
site.
WEB SITE AND PRESS RELEASES
The NAMITEC web site is active and regularly updated with news, events, results and other relevant
information. Also the NAMITEC institutional video movie and presentation slides are available. A new web site
was created and is published at a new address: http://www.namitec.org.br.
The site has also a restricted area for members where administrative matters are posted.
The journalist Luciano Valente has been contracted to be NAMITEC’s Public Relations professional, producing
a newsletter called “Boletim NAMITEC” and sending Press Releases to the media. The first newsletter was
published in December 2012 and 15 others were published in the period of February 2013 until March 2014, with a
total of 75 articles. The newsletter is being published on a monthly frequency. Each newsletter contains 4 articles
about the project activities. Based on these articles, the Press Releases are sent to the media to produce interviews
and publications. Following is a list of publications in the regular press as result of this effort.
Namitec in the media:
14/11/2013
Jornal da Globo – Rede Globo
“Pesquisadores fazem sspray que transforma energia solar em elétrica”
http://g1.globo.com/jornal-da-globo/noticia/2013/11/pesquisadores-fazem-spray-que-transforma-energia-solarem-eletrica.html
8/11/2013
Jornal do Brasil
“INCT Namitec deposita patentes em nanoeletrônica”
http://www.jornalbrasil.com.br/?pg=descnoticias&id=111353&nome=INCT%20Namitec%20deposita%20patentes%20em%20nanoeletr%F4nica
07/11/2013
Portal Brasil.gov.br
“Instituto deposita dois pedidos de patentes em nanoeletrônica”
http://www.brasil.gov.br/ciencia-e-tecnologia/2013/11/instituto-deposita-dois-pedidos-de-patente-emnanoeletronica
Página
15/04/2013
Folha de São Paulo
“Brasileiros desenvolvem transistor '3D'”
http://www1.folha.uol.com.br/tec/2013/04/1261931-brasileiros-desenvolvem-transistor-3d.shtml
68
15/04/2013
Folha de São Paulo
“Brasil sofre com falta de mão de obra capacitada, diz professor da Unicamp”
http://www1.folha.uol.com.br/tec/2013/04/1261940-brasil-sofre-com-falta-de-mao-de-obra-capacitada-dizprofessor-da-unicamp.shtml
10/04/2013
UOL – Convergência Digital
“Pesquisadores brasileiros vencem desafio nos EUA”
http://convergenciadigital.uol.com.br/cgi/cgilua.exe/sys/start.htm?infoid=33461&sid=3#.U2OMVl69wfZ
10/04/2013
Baguete
“UFSC e UFRGS são destaque da Intel"
http://www.baguete.com.br/noticias/10/04/2013/ufsc-e-ufrgs-sao-destaque-da-intel
02/07/2013
Revista Sustentabilidade
“Rede de micro e nanoeletrônica tem novo portal”
http://jornalggn.com.br/blog/rede-de-micro-e-nanoeletronica-tem-novo-portal
12/03/2013
Valor Econômico
"Transístor é menor que o vírus da gripe"
http://www.valor.com.br/empresas/3040868/transistor-e-menor-que-virus-dagripe?utm_source=newsletter_tectel&utm_medium=13032013&utm_term=transistor+e+menor+que+virus+da
+gripe&utm_campaign=informativo&NewsNid=3042076
17/08/2012
Jornal Nacional – Rede Globo
"Cientistas criam aparelho capaz de medir nível de conforto em ônibus”
http://g1.globo.com/jornal-nacional/videos/t/edicoes/v/cientistas-criam-aparelho-capaz-de-medir-nivel-deconforto-em-onibus/1913580/
Publications at the Ministry of Science, Technology and Innovation website
05/02/14 - INCT desenvolve sensor para detecção de hidrogênio
http://www.mcti.gov.br/index.php/content/view/352647.html
10/12/13 - Coordenador de INCT recebe distinção de entidade internacional
http://www.mcti.gov.br/index.php/content/view/351730.html
07/11/13 - INCT Namitec deposita patentes em nanoeletrônica
http://www.mcti.gov.br/index.php/content/view/351023.html
08/10/13 - Namitec realiza estudo inédito em faixa de radiação solar
http://www.mcti.gov.br/index.php/content/view/350260.html
02/07/13 - Novo site do INCT Namitec reúne conteúdo de 23 centros e universidades
http://www.mcti.gov.br/index.php/content/view/347674.html
Science Specialized Media
Página
12/07/2013
FapPr
“Novo site do INCT Namitec reúne conteúdo de 23 centros e universidades”
http://www.fappr.pr.gov.br/modules/noticias/article.php?storyid=446
69
12/04/2014
Revista Pesquisa Fapesp
“Em baixas temperaturas”
http://revistapesquisa.fapesp.br/2014/03/10/em-baixas-temperaturas/
http://revistapesquisa.fapesp.br/wp-content/uploads/2014/03/012-015_tecnociencia_2174.pdf
03/07/2013
“Jornal da Ciência”
Novo site do INCT Namitec reúne conteúdo de 23 centros e universidades
http://www.jornaldaciencia.org.br/Detalhe.php?id=87944
1/05/2013
Revista Fapesp
“O desafio do Sol - Nova geração de células flexíveis tenta superar dificuldades para aumentar o uso de energia
fotovoltaica no mundo”
http://revistapesquisa.fapesp.br/wp-content/uploads/2013/05/072-075_CelulasOrganicas_207.pdf
03 de maio de 2013
Universidade Estadual de Maringa
“Aluno da UEM é destaque nos EUA”
http://www.uem.br/index.php?option=com_content&task=view&id=6595
15 fev 2013
CNPq
“INCT de micro e nanoeletrônica apoia curso prático de microfabricação”
http://www.cnpq.br/web/guest/noticiasviews/-/journal_content/56_INSTANCE_a6MO/10157/875341
1/05/2012
Revista Pesquisa Fapesp
“A memória do Futuro”
http://revistapesquisa.fapesp.br/wp-content/uploads/2012/08/158-161_semicondutores.pdf
http://revistapesquisa.fapesp.br/2012/08/20/a-mem%C3%B3ria-do-futuro/
NAMITEC WORKSHOPS
X Workshop INCT-NAMITEC: September 7, 2013, Hotel Slaviero, Curitiba, PR.

XI Workshop INCT NAMITEC: April 10 and 11, 2014, FEEC/UNICAMP, Campinas, SP.
Página

70
Aiming internal discussions on the NAMITEC activities, interchange of experience and planning of continuing
activities, two workshops are held annually. The last two Workshops were:
EXHIBITIONS
The NAMITEC network participates regularly with stands at industrial and educational exhibits, aiming to
approach the industrial sector and to contribute to the diffusion of technology to society, especially to students.
Semana Nacional de Ciência e Tecnologia – SNCT 2013
October 15 to 21, 2012, São Paulo, SP. A shared stand of NAMITEC with LSI-USP
Chip in Curitiba/ SBMicro&SBCCI 2013
September 02 to 6, 2013, Curitiba, PR. A specific stand of NAMITEC
FEBRACE 2014
March 18 to 20, 2014, São Paulo, SP. A specific stand of NAMITEC
C.
D.
E.
F.
FEBRACE 2014, SÃO PAULO
SNCT 2013, SÃO PAULO
G.
PARTICIPATION AT SCIENTIFIC CONFERENCES
Details are available at the NAMITEC web site, at “Publications”. This includes presentation of papers, invited
lectures, round table discussions, among others.
A partial list of invited lectures about and/or including the INCT NAMITEC is as follows:
“MEMS Activities in Latin America”, Jacobus W. Swart, 19th World Micromachining Summit – MMS2013,
Shanghai, China, 21 a 24 de abril de 2013.
“Brazilian and South Korean trajectories in semiconductors”, Jacobus W. Swart, João A. Martino and Marcelo
Pavanello, Mesa redonda no 3o Fórum Brasil-Coréia, UNISINOS, São Leopoldo, RS, 24 de outubro de 2013.
“Nanoeletrônica”, Jacobus W. Swart, Invited talk at Nanomercosur 2013 – Nanotecnología para la
Competitividad Industrial, Buenos Aires, 12-14 de novembro de 2013.
“Nanotecnologia no Brasil”, Jacobus W. Swart, Invited talk at Nanomercosur 2013 – Nanotecnología para la
Competitividad Industrial, Buenos Aires, 12-14 de novembro de 2013.
“Desafios Tecnológicos das Redes NAMITEC”, Jacobus W. Swart, VIII Escola de Microeletrônica do Nordeste,
Natal, RN, 14-16 de novembro de 2013.
"Ultralow power consumption micro-sensors and reactors based on decorated carbon nanotubes". Stanislav
Moshkalev, 15th International Meeting on Chemical Sensors, Buenos Aires, 16-19 March 2014.
Página
“The Impact of ASIC Design and Prototyping Services on Education and Innovation”, Jacobus W. Swart,
EDS/IEEE Minicolloquium at Playa del Carmen, Mexico, organized by EDS Chapter at Puebla, 03 de abril de
2014.
71
Membro de mesa redonda no Painel Oportunidades e Estratégias em Microeletrônica: Políticas Públicas,
arranjos institucionais e investimentos, Jacobus W. Swart, Softex/ABDI, Belo Horizonte, 12 de março de 2014.
OBTAINED AWARDS
Best paper award in category of “Analog Circuits” at SIM2013, IEEE-CAS/SBMicro/SBC: MOREIRA, M. B.;
SOUZA, F. R.. GHz Fully-Integrated CMOS Class-AB Power Amplifier. In Proceeding of the 28° Simpósio Sul de
Microeletrônica, 2013.
Best paper award at SBCCI2013, SBmicro/SBC/IEEE, MARTINS, G. C.; SOUZA, F. R.. An RF-powered
temperature sensor designed for biomedical applications. In: 2013 26th Symposium on Integrated Circuits and
Systems Design (SBCCI), 2013, Curitiba. 2013 26th Symposium on Integrated Circuits and Systems Design
(SBCCI). P. 1-6
Best Thesis in PhD category, in the National Competition of Master and PhD dissertations and thesis of
SBMicro2013, Cleber Biasotto, “Processos alternativos para micro e nanotecnologia. Area: Semiconductor
Technology and Fabrication Processes, Adviser: Prof. Dr. José Alexandre Diniz. UNICAMP/INCT-NAMITEC
Best Dissertation in Master category, in the National Competition of Master and PhD dissertations and thesis of
SBMicro2013, Felipe Sampaio, “Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in
Multiview Video Coding”. Area: IC Design, CAD and Testing. Adviser: Prof. Dr. Sergio Bampi. Co-adviser: Prof.
Dr. Luciano Volcan Agostini, UFRGS / INCT-NAMITEC.
Best Dissertation in Master category, in the National Competition of Master and PhD dissertations and thesis of
SBMicro2013, Jorge Johanny Sáenz Noval, “Metodologia para a Otimização do Rendimento e Desempenho dos
Circuitos Analógicos usando Programação Geométrica”. Area: Semiconductor Technology and Fabrication
Processes, Adviser: Prof. Dr. Wilhelmus A. M. Van Noije. USP/ INCT-NAMITEC
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IEEE Fellow Award, Jacobus Willibrordus Swart, 1/1/2014, INCT NAMITEC coordinator and FEEC/UNICAMP.
NAMITEC NETWORK MANAGEMENT AND SUMMARY
INCT NAMITEC has an organization chart as depicted in the following figure:
The coordinator of an area interacts with the coordinators of the corresponding activities and requests a progress
report each four months. After analyzing he sends a general report about the activities of the area to the managing
committee. This committee has 3 meetings a year, to analyze the progress reports and to deliberate on other
managing issues, including approval of expenses and fellowships. Some of these issues are also discussed through
e-mail messages. The management also approves all common activities like workshops, colloquia, participation at
conferences with NAMITEC financing, visits between groups and so forth. A special effort is dedicated to
encourage collaboration between groups, by means of dedicated financial budget for visits between groups and
limiting NAMITEC financial support for conferences only for papers with co-authors from different institutions.
Also, fellowships for pos-docs and DTI are limited to work plans that include collaboration.
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Communications to all the NAMITEC members is done through e-mailing list: [email protected] and
through our web page, that also includes a restricted area for internal communications. The two annual workshops
are also key events for internal discussions, communications and management meetings.
PRODUCTIVITY INDICATORS
A summary of main results can be viewed through the following table of productivity indicators. These numbers
show that all our goals established in the original proposal were closely achieved in terms of these indicators, some
are a little bellow and most are in excess. On the other side, some information is probably missing once we depend
on receiving the information from a large number of members and some of them do not attend the request on time.
That means that in reality some numbers can higher than reported here.
Technological and Scientific Productivity
Publications
Books
Book chapters
National Journals
ISI indexed journals
Technological and Scientific Events
National conferences
International conferences
Abstracts at national conferences
Abstracts at international conferences
Others
Software
Patents of products
Patents of processes
Formation of Human Resources
Concluded
Scientific initiation
Master
PhD
Pos-docs
In Progress
Scientific initiation
Master
PhD
Pos-docs
Technology transfer to industrial sector
Cooperation with companies
Education and diffusion of science
Organization of Scientific Conferences
Colloquia NAMITEC
Organization of Short courses
News at open media
Workshops NAMITEC
Participation at exhibitions and workshops
Lectures and round tables for general public
5th year
In 5 years
4
3
7
83
27
54
58
432
90
147
5
9
583
726
88
76
1
0
3
2
10
7
66
48
26
5
247
258
99
41
36
50*
78*
12
10
~50
7
7
7
19
2
3
8
27
21
30
44
11
23
152
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* Note: these numbers of graduate students in progress needs to be reviewed and can be over-counted (no
accurate information about their graduation at this moment).