1979-03 Intel AR-81

ARTICLE
REPRINT
AR·81
March 1979
Technical articles _ _ _ _ _ _ _ _ _ __
Single-chipj)~MOS
microcomputer
processes signals in real time
Analog inputs and outputs surround high-speed pipelining processor;
user builds filters, oscillators, other analog systems with E-PROM software
•
,
by M. E. Hoff and Matt Townsend,
In/e/Corp .. $an laClara, Calif.
D Digi Lal processing of real- Lime analog signals, alt rac- operalion of Lh e microp rocessor in ce rt a in ways.
ti ve beca use lhe wave form s can be ma nipulatcd li ke
In gene ra l, a fixed rate is necessary because the c ha rnumhers undc r program co nt rol, has becn conllncd to ac te risti cs of a ny simulated ana log sys tcm a re a tTcclcd
especiall y configu red high-speed processors Lh aL can greaLl y by iL- in fac L, even small perLurbaL ions in sa mple
hand le lhe ca lcula tions necessa ry. Now, j ust as lhe ra te can a dd intole rab le noise to a syslc m . Thcrcfo re, Lhe
mi croproccssor pUl low-cost computing powe r into lhe Lime in which Lhe 2920 run s Lhrough iLS program has
hands of Lhe logic designers, a device from In Lel Corpo is per force Lo be fixed.
oITcring a nalog system designers a new tool: program mabiliL y, in Lhe form of iLS single-chip rea l- Li me signal
processo r , Lhe 2920.
The c hip was conceived oul a r a pressing nccd ror a
program ma ble c ircuit to se rve lhe va ri ous prolacals and
modu la tin g tec hniqu es used in tclecommunicat ions
circ uit s. It combines a na log-to-d igita l a nd di gita l-toa nal og co nvertcrs with a specially configured microco mputer to build a dev ice with a unique instru cti on sei, one
capable o f prog ra mming en Lire a nalog subsyste ms.
Th e kind of funcL ions Lhe 2920 ca n per fo rm filLerin g, mod ulaLin g, deLecL ing, limiLing, mixing, and
more - usuall y require lots of pass ive componenls, opera tional a mplificrs, a nd oth er such di sc rele a nd linea r
devices. WiLh few oUL board com pone nl s, Lh e 2920 ca n
build such co mple x devices as modems, equali ze rs, tone
so urces, a nd to ne receivers; t he 2920 ca n also be used for
such nonteleph oni c a ppl icat ions as process c0 l11 ro llers
a nd moto r or sc rvo motor dr ive rs.
Progra mmabilit y is what gives lhe chip iLS great
adva nt a ge: Lh e co nt e nt s of its on- board erasa ble
programmable rea d-onl y memory (E-PROM) cusLom i zes
iL for each applica Li on.
Cul lo fil
To ach ieve Lhat, th e 2920 executes eac h instru ct iol1 in
lhe sa me a mount of time, regard less of lhe opcra li on.
Also, to e nsure Lha t the total program exec uti on time
wi ll never vary, no conditiona l-jump instru ctions a re in
lhe instru ct ion repe rtoire (save fo r lhe jump from lhe
end of lhe program back Lo Lhe beginning). CondiLiona l
1. An810g microcomputer. Entire analog subsystems can be
prog rammed with Intel's 2920 real-time digital signal processor. l he
47 .000-miF device su rrou nds a special central processing unit with
a-d and d-a converters. ali under E-PROM program con trol.
Significan! diHerences
The processo r in the 2920 ditTers sign iR ca ntl y from a
conventiona l genera l- purpose microprocesso r. There is
some rese mbl ance: it processes digital data from a
cQJ1ventional a -d converte r a t th e c hip',s inpuL a nd feeds
the result to an outpuL d- a converte r. However, lhe kinds
of ca lculaLi ons needed for signal processing dilfer greaLly
from t hose o f data processi ng.
Moreover, si nce the operation is based on a rea l-t ime
sa mpling syste m, Lhe 2920 must run through its entire
prog ram each tim e it receives a data sample from lhe
in pu l a-d co nverter. The program execution t ime determin es the sa mplin g ra le, and th a t in turn res tri cts Lhe
Eleclronics /March 1, 1979
Reprinted from Elec l ronics l March 1. 1979. Copyrighl McGraw Hill Inc . 1979.
INSTRUCTlON
RAIE
>-
ao
o
w
6
=r
"
<t
IORCEXTERNAL
<:)
CLOCK)
"
"
ao
CLOCK
TI MING
RYSTAL
(192 RBITWQRQS)
PR OGRAM
~
CQUNTER
RESET/ ENO DF
PROGRA M
VQLTAGE
I NPUT
ERASABlE PRQGRAM MAB l E REAO-QN l Y MEMO RY
i
o
ao
PROGRAM '~
- -
ANO
~
-
f-
;R
P
-+----
i
-- - - - - - - ----
I- -
----
- - - - -- -
- ov ERFlDW
....
' 5 V ___
- 5 V ___
r
- -
------
RANOQM -
ACCESS
MEMORY
..... SCALER ~ -J..
28 81T
ARITHMETIC-
--
ANOLOGIC UNIT
(40 25·81T
WQRDS)
----
--- - -
-
---- -
CO NTRQL LQGIC
I
t.'J
o
-"
"
2
"
ANA LoG
INPU TS
{
INPUT
MULTIPLEXER
ANO
SAMPLE-AND-HOLD
f-- -
L""
It~::,",
EXTE RNAl CAPACITO R
C~ R
QUTPUT
DEMUlTI ·
PLEXER,
SAMPLE·AND·
HDlO. ANO
BUFFER
AMPLlFIERS
/'
REFERENCE
VOLTAGE
INPUT
- - - - - t- I- I-
ANALOG
DUTPUTS
DEMU LTIPLEXER
CO NTROL
•
2. Architecture. The 2920 is programmed wilh 24-bit inSlructions, up lo 192 01 which are slored in E-PROM. lhe digital seclion pipelines
instructions to boost throughput and interfaces with the analog section through lhe da ta register, which appears as memory 10cation.
operators, however, do allO\\I logical operations to be
carried out wit hout any va riat ia n occurring in th e
progra m execution time.
Allhough Ihese lechniques do somewhal resl ri cl
programming, Ihey eslablish a fixed sample rale, based
on the time needed to execute one pass through the
program, The rale can Ihus be compuled simply as lhe
instru ctian exec utian rate divided by lhe number af
instru ctions in lhe programo
For di gilal processing of ana log signals on a sa mpled
bas is, the microprocessor must be extremely ras t ir any
decenl bandwidlh is lo be a ttained. Nyq uist's th eory
diclates lhat a continuous system can be accu ra tely
simulaled on a sampled bas is only if lhe sa mpling rale
exceeds twi ce the highesl freq uency present in the
signa ls being processed - and most pract ica l situat ions
call fo r an even higher sampling rale.
On top or that, since a li th e calculations assacia ted
Electronic s /March 1, 1979
Slmulatlng wlth sampllng systems
lhe operation of lhe 2920 find s its basis in sampling
theory, which sta tes lha! a contin uous function (ar waveform) can be accura tely represented by a train of periodic
samples. as long as lhe sampling is done with high enough
frequency. 1I is l he high sampling rate required-and more
diHicult still. lhe immense compulati onal grind between
samples-that has restricted lhe digital processing 01
analog signals to full-blown machines. lhe 2920 solves lhe
number-cru nching problem with a pipelined archilecture
and a elever multiplication algorithm lhal requires many
fewer circuits and steps than l he shift-add algorithms wilh
which mos! computers multiply numbers.
lhe RLe aclive Iilter shown below in A has a Irequency
response Ihal produces a complex-conjugate pair of
poles. The cha racleristics 01 lhe filt er - ils Iransfer fu nction , gain, and pole locations-are given by lhe equations.
The con tinuous fi1ter can be sim ulated by lhe sampling
system in B. The circled Xs represent mult ipliers, lhe
circled L is an adder. and l he blocks with r I represent
timing delays 01 one sample period. Coefficient s {J I and {J2
control the fil ter's frequen cy parameters, while coefficien t
G adjusts its gain.
The equations to lhe right 01 lhe fi gure give lhe simulaled filter' s response. Although a sampling syslem, the
filler wou td simulale exacUy lhe continuous funclion in A,
were lhe sampling done aI infinite Irequency: coefficient {J,
= 2e- aT approaches lhe value 2 as lhe sample period
tends lo zero; simi larly, coeff icien l f32 = - e- 2aT
approaches -1. However. aI finile sampling frequencies.
small errors in Ihose coeHicients can ca use signilicant
changes in the characterisl ies of the fill er, and ali arith metie must therefore be performed wi th high preeision.
A general-purpose digilal computer is able to simula le
lhe sampling slage in B with three equations:
Y2 = y,
y, = Yo
yo = (J,y, + {J2Y2+GX
where lhe variables lo the left of each equals sign are
assigned lhe values lo its righl. Note Ihal each multiplicalion involves one va ria ble and one va lue Ihal is fixed by
lhe design of lhe filler . Inslruetions in the 2920 are seI up
lo add or sublract a va riable Irom anolher where lhe firsl
va riable is scaled by a power 01 Iwo. Thus 'a single instruction could take any of lhe lollowing lorms:
= 1.7656 = 2'-2 - '+2- 6
= -0.994 14 = -2 0 +2- 7 -2- 9
= 0.00293 = 2-'-2- 00
which lhe 2920 can perform quickly and with a minimum
01 ci rcuits. The filter slage 01 B is carried oul direct1y with
2920 instruction in lable D. A left-shift 01 1 is equivalent to
multiplying by 2', a right-shift 016 multiplies by 2- 6 , and
so on. The mnemonics LDA. AOO. and SUB represent
load, add. and subtracl operating codes.
This method permits much lasler multiplicalions by
constants than a conven tiona l shifl-add mulliplier could
achieve. It is especially eHective here beca use such mulliplicalions dominale digital-filler ca lculations.
B
A
~= A/ LC
R
Voe
I
1
V,.
VOUT
1
1
S2 ~
11 , " 2e aT cos bT {32" _e- 2aT
WHERE T = SAMPLE PERIOO
sR/ L + l/lC
a = R/2L
de GAI N " A
b "..;r.1/;cLC"--'R~'I~"~
'
de GAIN " G/(1 - (3, -(12 )
MAXIMUM GAIN " 4A/ R,/ 'l7C'
AT f " 1/21'l',/ I/lC R ~/4 L '
s PLANE PO LES AT - RI2 L
!. i yll/l C fr!/4 Ll
' {32
MAXIMUM GAIN = G/((1 +(32 )
x yll + liJ12/ 4(i2 il
ATf = 1121'l'T X
eos
o
(iJd l
-(1 2) /4 jJ2 )
Instruet io n
/! "
RI2 ,M
Operatlo ll
(3 bits)
Sou ree
(6 bits)
Dest lll at ion
(6 b it s)
LDA
LDA
LDA
v,
V,
Vo
V,
v,
ADD
v,
v,
v,
v,
SUB
V,
ADD
X
SUB
x
SUB
AOD
SUB
Eleclronics / March 1, 1979
+
INSTRUCTlON SEOUENCE FOR TWO POLE FllTER
c
.
"
The usefulness 01 sca ling by powers of two soon becomes
clear. The coefficients can be expressed in sums and
diHerences 01 powers 01Iwo. as in l he examples:
{3,
{3,
G
\
l
= y(2')
x = x + y(2')
x = x - y(2')
x
Vo
Vo
Vo
none
Ilone
lelt 1
righl2
rig hl 6
nane
righl7
right 9
Vo
Vo
righl8
right 10
Vo
Vo
Vo
Comments
S hilt
(4 bits)
equi valent to Y2 '" y,
equivalenl lo Y, '" Yo
1l0W
have Yo '"
iJ , y,
now have Yo '" {J , y, +
(;1 2 Y2
110W
have Yo :: {J , Y, +
112 Y2 +
G x
INPUT SELECT
...L
INPUT
(IOF 4)
TO SUCCESSIVE·
APPROXIMATION
LOGIC
ROW4
RO\\' 3
ROW 2
OIGITAUO ·
ANALOG
CO NVERTER
VOLTAGE " OV
ROVl 1
3. Sign bit. Adding a sign bit to basic 8· bit conversions yields 9-bit
precision. The 2920 uses a llip switch to supply a correct-polarity
signal Irom lhe sample-and-hold capacitor (Ieft) to the compara lor
L -_ _
~y~
_3__ 4
CO LUMNS
d·,
REFERENCE CONVE RTER
VOLTAGE
OUTPUT
used lor successive-approximalion analog-to-digital conversion.
4. Folded ladder. The 2920's analog·to-digi lal converter uses a
•
with the production of an output sample must bc resistive ladder. lolded inl0 a square array. Thal conliguration miniperformed with each sa mple tak en, lh e microprocessor mizes the effects 01 process inconsistencies and temperatu re across
must ha ve an extremely high-speed number-crunching the surface 01 the chip, thus improving overall accuracy.
ca pability. Even a 10-kilohertz bandwidth, ror exa mpl c
wou ld req uire sa mpling a1leas1 a1 a 20-kH Z ra te, or once replaces the res ult with the largcs t sto rab le value.
evcry 50 microseconds. A program of. say, 100 ins tru cTo handlc th e arilhme ti c, each o f the 40 locali ons in
tions, which was executed al a rate of 50 microseconds sc ratchpad RAM is 25 bits \Vide. Addressing, howcvc r, is
per sa mple, would require an ave rage instruction-cycJe with a 6-bit word; the addilion a l 24 addresscs sc lcct
l ime of 500 ns - a spced that fcw minicomputers ca n predctcrmincd constants and th e analog sect ion 's data
boast.
rcgi sler. T o boosl throughput, thc RAM was dcs igned
But the 2920 ca o do it ali 00 a 47,000-square-m il c hip wit h du a l-port cells that can bc addressed through ci thcr
( Fig. I) , whic h, moreover, is built \Vith a sta odard 0 - or their ports.
channel me ta l-oxide-semico nduc tor processo
The E- PROM can store up to 192 instructi oos or 24 bits
cacho The in struction fo rmal has fi vc co ntiguous field s:
Oivided in Ihree parIs
the digital operator, the source addrcss, the des1inati on
The 2920, as di agrammcd io Fig. 2, divides into threc address, thc cx tent or shirli ng, a nd thc aoa log opcrator.
major subsection s: program memory, lhe arithmctic (or Such a wide word may be lik ened to a microprogram
digit al- processing) portioo, a nd the a oalog ioput a od word in a computer wit h a control store, for it performs
output conversion section. The E- PR OM program Ille mory seve ra I operat ions al onec. In this case, they are
controls both lhe analog conversion and digital sections complete memory-to-memory opera tions.
or the chi p.
The lower limil
Four aoaiog ioputs eotcr a od cig ht aoa log outputs
At lhe 2920's rastest operatiog speed, each iostru clion
leave lhe 2920. A multiplexer a llows the rour aoalog
inputs lo share lhe ioput sa mple-aod-hold circ uit. executes in 400 nanoseconds. The largest prog ram the
Analog-to-di git a l conversion is performed by succcss ive 2920 cao ha ndle - l92 iostru c tions - exec utcs in 76.8 /lS,
a pproximation with lhe oulput d-a co nverter, wh ich i5 and thu s yields a minimum sa mpling rate of approxi lhe resistor- Iadd c r type. A de multiplexe r provides eig ht ma te ly 13 kH z. The worst-case bandwidth o r thc c hip,
buffered outputs, eac h or which has its own sa mple- according to Nyqui st then , is a bout 6.5 kH z.
aod-hold circuit. The data registe r lioks th e a oa log
Shorter prog ra ms wi ll, or co urse, providc hi ghcr
sa mplio g ra tes. Also, techniqucs likc stackiog multipl e
sec tioos to lhe digital portioo o r thc chip.
copies of a routine can boost the sa mpling frequ e ncy and
Unusual arilhmelic
hcnc e thc possibl e ba ndwidth .
To ma ximi ze speed or calcul a ti on, th e 2920 sign,,1
The mic roprocessor in the 2920 comprises a two-port
scra tchpad random -access me mory, a binary scaler, and processo r uses pipelining techniqu es. Four instructions
ao a rithmetic-ao d-Iogic uoi!. (Thc da ta registe r uscd by a re retc hed rrom E-PROM a t once, and the retch opc rath e aoalog po rlioo or the c hip is ac tu a ll y part o r th c tion for the nex t four overlaps execution of the previous
RAM, so tha t the processor sees th e inputs and outpu1S as four instructi ons. Moreovcr, lh e arithm etic operations
are equippcd with carry- Iookahcad ac ross th e rull width
an address location in memory .)
Although the precision or the a-d a nd do a coovertcrs is of the acc umula tor.
The arithmetie -and-log ic unit (ALU) carries ou1 5uc h
9 bits, internai arithmetic is wilh 25-bit precision, since
accommod a ting the buildup or small rouod-on- c rror bas ic operalions as da ta movemen t, addition , subtracover time requires much higher precision in th e interme- tion , abso lut e mag nitude. an d severa l log ica l operations.
diate calc ul a ti ons tha n ror th e final va lue. Should a n Each ·elementary machine instruction fetches two operarithmetic overflow occur, the processor sa turates: in a nd s rrom the sc ra tc hpad RAM, passes the first through
other words, it automatica ll y and insl antaneo us ly the binar y sca le r, performs th e se lec ted arithmetic fune-
Electronics / March 1, 1979
.
lNPUT
SIGNAL
INPUT
LQWPASS
FllTER
I--
AUTQMATIC
GAIN
CQNTROL
I--
MIXER
VOLTAGE'
CONTROLL EO
QSC ILLATOR
---
WAVEFO RM
MO DIFICATIO N
---
NARRO W'
BANO
Fll TER
f--.-
FULLWAVE --+
RE CTI FIER
LDWPASS
FILTER
VERTICAL
OUTPUT
HO RIZQN TAL
OU TPUT
SAWTOQTH
05CILLATQR
5. On e·chip spectrum analyzer. l he 2920's resources are sufficient for building an audio spectrum analyzer. The inpul signal is
gain-controlled. then helerodyned with a swepl oscillalor; lhe detected sum signal drives lhe vertical inpu l of an oscilloscope.
tion, and repl aces lhe second opcrand wit h lhe rcs ults a f
lhe opera tion.
The key lO lhe 2920's high-speed , high-precision a rilh-
meti c is lhe binary sca ler. Unlikc lhe usual shift-add
mullipliers, whi ch require a cyc1e pe r bil , lhe 2920 uses
seq uences af scaled additions and subtractions (see "Re a li zing a co mplex · conjuga le pole pair," p. 107) in
mu ltiplying va ri ables by eonstants to red uce Lhe number
of cycles to abo ul a lhird. (S ince mosl fille rs used in
analog applicalions are fi xed, rnul tiplica tions are usuall y
by conslanls.)
The bi nary sca ler modifies a val ue passing Lh rough it
by in efrect multiplying it by a power Df two, or 2 k, where
k ranges from + 2 lo - 13. If, as a resu ll, l he producl is
grealer lha n 25 bils (a nd hence loo la rge for lhe RAM) ,
the A LU saturates and provides a signal on iLs overnow
oulput pino Thc overftow outpuL is use ful dur ing system
debugging for delerm ining when sca led va riables are oul
o f range.
Conditional options
Some of lhe ALU'S basic operat ions can opera le condiliona ll y, using selecled bilS o f lhe dala regisler norma ll y
associated wit h a-d and d-a conversions. The multiplication or division of one variable by anolhcr is made
possible by conditiona l add iLion and subtraction , rcspectivcly. Fina ll y, conditiona l operations ca n perform logic
and can generate di scont inuous transfe r functi ons.
The a-d and d-a con versions are given 9-bit
precision with the add iti on of a sign bit. A fl ip-sw itch
circuit , wh ich is shown in Fig. 3, provides lhe dou ble
economy of appending the sign bit whi le at the same
time allowing the 29 20 signal processar to use only a
sing le positi ve-voltage referencc .
The d-a converter is built around Lhe folded resistor
Electro ni cs /March 1. 1979
str ing and switch array shown in Fig. 4. Folding the
resistor sLring lesse ns lhe converter's scnsitiv ity to
temperat ure and process va riations across the surface of
lhe chip. T ha l, coupled wil h lhe fac ls lhal processa r
tim ing is crys tal-contro lled, lhat lhe convcrler's accuracy is eSla blished by an exle rn a l reference vollage, a nd
lhal a li inlernal ca lcul a lio ns a re digil al, adds up lO an
a na log subsyslem lha l is fa r slabler lha n fu lly a na log
cou ntcrparts.
The rcsources of lhe 2920 are sumcien t to provide the
equi va lenl of up lo 40 poles of fi llering, a r 20 complexconjuga te pole pairs. That amou nl is enough to pul man y
complex ana log syslems, including a dual'lon e mu ll ifrequ ency (OTMF), or Touch-lone, receiver on j usl a single
chip.
The powe r o f lhe 2920 is dram al ized by an a udi o
spectrum ana lyze r, wh ich can displ ay Lhe frequency
response of a circui l under test on an oscilloscope. One
such analyzer is di agrammcd in Fig. 5. It generatcs
vertical and horizontal OUlpULS for direct connection to
lhe oscilloscope a nd uses helerodynin g lO mi x the inpul
signal with Lhe signa l from a swept oscillator.
Sequence 01 events
The in pul sig na l lO be ana lyzed is fim filtered wilh a
simplc externai network to remove hi gh- frcque ncy
componcn ts lhat cou ld cause al ias ing, or the generation
o f spurious signa ls. O nce in lhe 2920, lhe sig na l passes
lh ro ugh lhe equiva lenl of a tIVo-pole 101V·pass filter for
fur ther band-limit ing. Next it is modulated, prior to
mixing, by an automa tic gain con trol- simpl y a division
algori thm whose di visor is derived by passing the absoIUle mag nitude of lhe signa l lh roug h a low pass fi ller (lo
gel lhe weig hled average) .
A sccond portion of th e program simu latcs a pair of
•
MEMORY UTILlZATION FOR SPEGTRUM ANALYZER
Modu le
Inpul filler
AU lomalic gain control
Sweelloscillator
Vollage-conlrolled oscillator
seclion cenlered ai 400 Hz displays sharp bandpass characlerislics.
The Iwo-pole filler uses 10 inslruclions of lhe 2920's E-PAOM
program memory, leavi ng 182 inslruclions for olher filter funclions.
oscillalors, lhe first of which determines th e spectrum
sca n rat e - hence, the horizontal swecp freq uency of the
7
10
Mixer
Aectifier
12
30
1
Lowpass filter
10
Total
Random ·access
memory
wonls
20
18
5
Waveform modifi(!r
Narrow·ba nd filter
6. Twa palas. Speclral analysis of a sim pie second-order IiIler
Read-on ly
memory
word s
113
5
1
1
1
1
O
6
O
2
17
oulpu t. Finally, lhe sig na l is low pass-filtered lo drive lhe
verl ical display. Since bOI h horizonlal a nd verlical
display oulpuls of lhe 2920 a re deli vered as sa mpledan d-held signals, som c simple eXlernal fillers may be
used lo smoolh lhe display.
The filters used in lhe speclrum a nalyzer a re singlepole or complex-conjugate-pole recursive sections. Mu l-
osci lloscope - and lhe second of which sim ulales a vollage-conlrollcd oscillalor (VCO) drivcn by lhe first. II is
lhe second oscillalOr, swe pl lhrough lhe ra nge of inlcr-
liple pole fillers are simpl y cascades of bas ic seclions.
The 2920 ca n a lso simulale finile impu lse-res ponse
fillers, and can implemenl zeros eilher independenlly ar
est, that bea ts agai nst th e input signa l in lhe mi xe r.
between pole sections.
Dealing wilh aliasing
Both oscillators produce linear sawto01 h waveform s;
but beca use lh e program com pu tes sa mpled wave forms
for lhese simulated osci lla tors, al iasing distortion co uld
be a problem if harmo nics in lhe saw tooth were to
inleracl with lhc sa mpl ed fr eq ucncy a nd produce
The analyzer has a frequency range of 300 Hz lo 3
kiloherlz, swepl 10 limes per second, wilh a resolulion of
aboul 100 Hz. The na rrowband filter is cenlc red aI
4.5 kHZ. The sa mpling ralc is a boul 13 kHZ.
Room lo spare
undergoes a nonlinear trans format ion in ord er to approx -
The lable shows lhe a mounl of progra m a nd sc ralchpad memory a llocated lO each block for lhe given paramelers. (Dilferenl paramelers for lhe funclional blocks in
lhe a nal yze r mighl cha ngc lhe a mounl of 2920 memory
imale a si nusoida l wavefo rm . The 2920 performs lhe
used in cach , however.)
non linear transformat ion with a pi ecewise-linear approxim at ion th at comb in es absolute-magn itude functions and
the elfects of overflow sat ura ti on in the AL U. The first
osci ll ator, it may be noted , needs no such tran sformation
beca use it operates at such a low frequency that any
Since lhe program does nol occupy ali lhe RAM a nd
ava ilable, more fun clio ns cou ld bc ad ded ar,
a llerna lively, lhe sa mpling ralc could be ra ised lo as
high as 20 kH Z. As a nolher oplion, mulliple co pies of
inpul sa mpling and fi llering algor ilhms could be inserled
lo incrcase the elfeclive sa mpling ral e, lhcre by a llowing
use of a si mpler a nli-a liasing filler exlernal lo lhc 2920
spurious frequcncy components.
For lha I rcason, lhe outp ut of the sccond oscillator
ha rmonics high enough to react wilh the sample rate a rc
in sig ni ficant.
Good mixer
E- PR OM
signal processor's franl e nd .
The 2920 is sched uled for produclion in lhe laller parI
The mixer uses a multiplica tion routine lo combine
of th is yea r. Since the chip is a microprocessor a nd lhen
lhe oulpul of lhe second oscillalor wilh lhe filtered,
amplilude-conlrolled signal und er a na lys is. The oulp ul
some, il musl be supporled aI least as adeq ualely as
of th e multiplier conla in s sum and difference frequen-
cu rrent digita l microprocesso rs. Support plans call for an
asse mbler and simul ator thal will be resident on the
cies. Only lhe sum frequenc y is . of inleresl for lhe
Inlell ec microcompuler developmenl syslem.
ana lys is, and a narrow-band filter extracts it from lh e
Beca use lhe arithmetic assoc iated with the desig n and
opt imi za tion af digi ta l filters is extremely comp lex , a
mixer's composile signa l. The amplilude of lhe sum
frequency corresponds exaclly la lhe inpul signa llevel aI
a frequency dClcrmined by lhe dilference bClwee n lhe
design-aid soflware packagc capable of inleraclive filler
desig n and automat ic compi la lion inta 2920 assembl y
ce nle r frequency of th e narrow-band fil ter and lhe
language is a lso pla nned . Those packages will equip
frequency of lhe VCO.
The 2920's absolule-magnil udc algor ilhm performs in
elfecl a full-wave rcclificalion of lhe nar row-ba nd fi ller's
ana log system des igne rs wi th ali the conveniences users
of co nventiona l mi croprocessors are by now acc uslomed
lOe~~.
O
Electronic. 1 March 1, 1979
.
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